From 8fe9a076adf308ec813246a96f915c5ab5b6a75f Mon Sep 17 00:00:00 2001 From: Andre Vieira Date: Tue, 21 May 2019 14:51:43 +0100 Subject: [PATCH] [GAS, Arm] PR24559: Fix pseudo load-operations for Armv8-M Baseline gas/ChangeLog: 2019-05-21 Andre Vieira PR 24559 * config/tc-arm.c (move_or_literal_pool): Set size_req to 0 for MOVW replacement. * testsuite/gas/arm/load-pseudo.s: New test input. * testsuite/gas/arm/m0-load-pseudo.d: New test. * testsuite/gas/arm/m23-load-pseudo.d: New test. * testsuite/gas/arm/m33-load-pseudo.d: New test. --- gas/ChangeLog | 10 ++++++++++ gas/config/tc-arm.c | 5 +++++ gas/testsuite/gas/arm/load-pseudo.s | 3 +++ gas/testsuite/gas/arm/m0-load-pseudo.d | 12 ++++++++++++ gas/testsuite/gas/arm/m23-load-pseudo.d | 12 ++++++++++++ gas/testsuite/gas/arm/m33-load-pseudo.d | 11 +++++++++++ 6 files changed, 53 insertions(+) create mode 100644 gas/testsuite/gas/arm/load-pseudo.s create mode 100644 gas/testsuite/gas/arm/m0-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m23-load-pseudo.d create mode 100644 gas/testsuite/gas/arm/m33-load-pseudo.d diff --git a/gas/ChangeLog b/gas/ChangeLog index 90fc3c3..dfd5d6f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,15 @@ 2019-05-21 Andre Vieira + PR 24559 + * config/tc-arm.c (move_or_literal_pool): Set size_req to 0 for MOVW + replacement. + * testsuite/gas/arm/load-pseudo.s: New test input. + * testsuite/gas/arm/m0-load-pseudo.d: New test. + * testsuite/gas/arm/m23-load-pseudo.d: New test. + * testsuite/gas/arm/m33-load-pseudo.d: New test. + +2019-05-21 Andre Vieira + * testsuite/gas/arm/armv8_1-m-bf.d: Allow different branch target naming conventions. * testsuite/gas/arm/armv8_1-m-bfl.d: Likewise. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index ff7f9ad..136df33 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -8696,6 +8696,11 @@ move_or_literal_pool (int i, enum lit_type t, bfd_boolean mode_3) inst.instruction |= (imm & 0x0800) << 15; inst.instruction |= (imm & 0x0700) << 4; inst.instruction |= (imm & 0x00ff); + /* In case this replacement is being done on Armv8-M + Baseline we need to make sure to disable the + instruction size check, as otherwise GAS will reject + the use of this T32 instruction. */ + inst.size_req = 0; return TRUE; } } diff --git a/gas/testsuite/gas/arm/load-pseudo.s b/gas/testsuite/gas/arm/load-pseudo.s new file mode 100644 index 0000000..2102522 --- /dev/null +++ b/gas/testsuite/gas/arm/load-pseudo.s @@ -0,0 +1,3 @@ +.syntax unified +ldr r0, =(0x30) +ldr r0, =(0x70000000) diff --git a/gas/testsuite/gas/arm/m0-load-pseudo.d b/gas/testsuite/gas/arm/m0-load-pseudo.d new file mode 100644 index 0000000..cc7e085 --- /dev/null +++ b/gas/testsuite/gas/arm/m0-load-pseudo.d @@ -0,0 +1,12 @@ +# name: Load pseudo-operation for Cortex-M0 +# as: -mcpu=cortex-m0 +# objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb +# source: load-pseudo.s + +.*: +file format .*arm.* + + +Disassembly of section .text: +[^>]*> 4800 ldr r0, \[pc, #0\] ; \(00000004 [^>]*>\) +[^>]*> 4801 ldr r0, \[pc, #4\] ; \(00000008 [^>]*>\) +#... diff --git a/gas/testsuite/gas/arm/m23-load-pseudo.d b/gas/testsuite/gas/arm/m23-load-pseudo.d new file mode 100644 index 0000000..2e0dbe5 --- /dev/null +++ b/gas/testsuite/gas/arm/m23-load-pseudo.d @@ -0,0 +1,12 @@ +# name: Load pseudo-operation for Cortex-M23 +# as: -mcpu=cortex-m23 +# objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb +# source: load-pseudo.s + +.*: +file format .*arm.* + + +Disassembly of section .text: +[^>]*> f240 0030 movw r0, #48 ; 0x30 +[^>]*> 4800 ldr r0, \[pc, #0\] ; \(00000008 [^>]*>\) +#... diff --git a/gas/testsuite/gas/arm/m33-load-pseudo.d b/gas/testsuite/gas/arm/m33-load-pseudo.d new file mode 100644 index 0000000..e77bffd --- /dev/null +++ b/gas/testsuite/gas/arm/m33-load-pseudo.d @@ -0,0 +1,11 @@ +# name: Load pseudo-operation for Cortex-M33 +# as: -mcpu=cortex-m33 +# objdump: -dr --prefix-addresses --show-raw-insn -M force-thumb +# source: load-pseudo.s + +.*: +file format .*arm.* + + +Disassembly of section .text: +[^>]*> f04f 0030 mov.w r0, #48 ; 0x30 +[^>]*> f04f 40e0 mov.w r0, #1879048192 ; 0x70000000 -- 2.7.4