From 8fbc7fd567f954908e476c9beb1bd78b4a7eebc5 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Fri, 31 Jan 2020 18:57:10 +0000 Subject: [PATCH] [DAG] SimplifyMultipleUseDemandedBits - peek through unused ISD::INSERT_SUBVECTOR subvectors If we don't demand any elements of the inserted subvector then just skip it. --- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 12 ++ llvm/test/CodeGen/X86/avg.ll | 262 +++++++++++------------ llvm/test/CodeGen/X86/avx512-insert-extract.ll | 2 - llvm/test/CodeGen/X86/vec_cast3.ll | 4 +- 4 files changed, 143 insertions(+), 137 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index a095dfb..78fbfc5 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -749,6 +749,18 @@ SDValue TargetLowering::SimplifyMultipleUseDemandedBits( return Vec; break; } + case ISD::INSERT_SUBVECTOR: { + // If we don't demand the inserted subvector, return the base vector. + SDValue Vec = Op.getOperand(0); + SDValue Sub = Op.getOperand(1); + auto *CIdx = dyn_cast(Op.getOperand(2)); + unsigned NumVecElts = Vec.getValueType().getVectorNumElements(); + unsigned NumSubElts = Sub.getValueType().getVectorNumElements(); + if (CIdx && CIdx->getAPIntValue().ule(NumVecElts - NumSubElts)) + if (DemandedElts.extractBits(NumSubElts, CIdx->getZExtValue()) == 0) + return Vec; + break; + } case ISD::VECTOR_SHUFFLE: { ArrayRef ShuffleMask = cast(Op)->getMask(); diff --git a/llvm/test/CodeGen/X86/avg.ll b/llvm/test/CodeGen/X86/avg.ll index e4a5d13..a9154c5 100644 --- a/llvm/test/CodeGen/X86/avg.ll +++ b/llvm/test/CodeGen/X86/avg.ll @@ -2655,122 +2655,116 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind ; AVX512BW-NEXT: pushq %r12 ; AVX512BW-NEXT: pushq %rbx ; AVX512BW-NEXT: subq $24, %rsp -; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero,mem[8],zero,mem[9],zero,mem[10],zero,mem[11],zero,mem[12],zero,mem[13],zero,mem[14],zero,mem[15],zero ; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero,mem[8],zero,mem[9],zero,mem[10],zero,mem[11],zero,mem[12],zero,mem[13],zero,mem[14],zero,mem[15],zero -; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512BW-NEXT: vpmovzxbw {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero,mem[8],zero,mem[9],zero,mem[10],zero,mem[11],zero,mem[12],zero,mem[13],zero,mem[14],zero,mem[15],zero +; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm3 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm3, %xmm4 -; AVX512BW-NEXT: vmovq %xmm4, %rbx -; AVX512BW-NEXT: vpextrq $1, %xmm4, %rbp +; AVX512BW-NEXT: vmovq %xmm3, %rbx +; AVX512BW-NEXT: vpextrq $1, %xmm3, %rbp +; AVX512BW-NEXT: vextracti128 $1, %ymm3, %xmm3 ; AVX512BW-NEXT: vmovq %xmm3, %rdi ; AVX512BW-NEXT: vpextrq $1, %xmm3, %rsi ; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm3 -; AVX512BW-NEXT: vmovq %xmm3, %rdx -; AVX512BW-NEXT: vpextrq $1, %xmm3, %r15 +; AVX512BW-NEXT: vmovq %xmm2, %rdx +; AVX512BW-NEXT: vpextrq $1, %xmm2, %r10 +; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 ; AVX512BW-NEXT: vmovq %xmm2, %r8 -; AVX512BW-NEXT: vpextrq $1, %xmm2, %r14 -; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm0 -; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm3 -; AVX512BW-NEXT: vmovq %xmm3, %r9 -; AVX512BW-NEXT: vpextrq $1, %xmm3, %r10 +; AVX512BW-NEXT: vpextrq $1, %xmm2, %r9 +; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm1 +; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero +; AVX512BW-NEXT: vmovq %xmm2, %r14 +; AVX512BW-NEXT: vpextrq $1, %xmm2, %r12 +; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 ; AVX512BW-NEXT: vmovq %xmm2, %r11 ; AVX512BW-NEXT: vpextrq $1, %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill -; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm0 -; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm2 -; AVX512BW-NEXT: vmovq %xmm2, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill -; AVX512BW-NEXT: vpextrq $1, %xmm2, %r13 -; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero +; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm1 +; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero +; AVX512BW-NEXT: vmovq %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill +; AVX512BW-NEXT: vpextrq $1, %xmm1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill +; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm1 +; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero ; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm3 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm3, %xmm4 -; AVX512BW-NEXT: vmovq %xmm4, %rax +; AVX512BW-NEXT: vmovq %xmm3, %rax ; AVX512BW-NEXT: addq %rbx, %rax ; AVX512BW-NEXT: movq %rax, %rbx -; AVX512BW-NEXT: vpextrq $1, %xmm4, %rax -; AVX512BW-NEXT: addq %rbp, %rax -; AVX512BW-NEXT: movq %rax, %rbp +; AVX512BW-NEXT: vpextrq $1, %xmm3, %r13 +; AVX512BW-NEXT: addq %rbp, %r13 +; AVX512BW-NEXT: vextracti128 $1, %ymm3, %xmm3 ; AVX512BW-NEXT: vmovq %xmm3, %rcx ; AVX512BW-NEXT: addq %rdi, %rcx -; AVX512BW-NEXT: vpextrq $1, %xmm3, %r12 -; AVX512BW-NEXT: addq %rsi, %r12 -; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 -; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm3 -; AVX512BW-NEXT: vmovq %xmm3, %rax -; AVX512BW-NEXT: addq %rdx, %rax -; AVX512BW-NEXT: movq %rax, %rdx ; AVX512BW-NEXT: vpextrq $1, %xmm3, %rax -; AVX512BW-NEXT: addq %r15, %rax +; AVX512BW-NEXT: addq %rsi, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill +; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 +; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm2[0],zero,xmm2[1],zero,xmm2[2],zero,xmm2[3],zero +; AVX512BW-NEXT: vmovq %xmm2, %r15 +; AVX512BW-NEXT: addq %rdx, %r15 +; AVX512BW-NEXT: vpextrq $1, %xmm2, %rbp +; AVX512BW-NEXT: addq %r10, %rbp +; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 ; AVX512BW-NEXT: vmovq %xmm2, %rax ; AVX512BW-NEXT: addq %r8, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: vpextrq $1, %xmm2, %rax -; AVX512BW-NEXT: addq %r14, %rax -; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm1 -; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero -; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm3 -; AVX512BW-NEXT: vmovq %xmm3, %rax ; AVX512BW-NEXT: addq %r9, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: vpextrq $1, %xmm3, %rax -; AVX512BW-NEXT: addq %r10, %rax -; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill +; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm0 +; AVX512BW-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero +; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero ; AVX512BW-NEXT: vmovq %xmm2, %rax -; AVX512BW-NEXT: addq %r11, %rax +; AVX512BW-NEXT: addq %r14, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: vpextrq $1, %xmm2, %r14 -; AVX512BW-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Folded Reload -; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm1 -; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero -; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm2 -; AVX512BW-NEXT: vmovq %xmm2, %r10 -; AVX512BW-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Folded Reload -; AVX512BW-NEXT: vpextrq $1, %xmm2, %r9 -; AVX512BW-NEXT: addq %r13, %r9 -; AVX512BW-NEXT: vmovq %xmm0, %rax -; AVX512BW-NEXT: vmovq %xmm1, %r8 -; AVX512BW-NEXT: addq %rax, %r8 -; AVX512BW-NEXT: vpextrq $1, %xmm0, %rdi -; AVX512BW-NEXT: vpextrq $1, %xmm1, %rsi -; AVX512BW-NEXT: addq %rdi, %rsi +; AVX512BW-NEXT: vpextrq $1, %xmm2, %rax +; AVX512BW-NEXT: addq %r12, %rax +; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill +; AVX512BW-NEXT: vextracti128 $1, %ymm2, %xmm2 +; AVX512BW-NEXT: vmovq %xmm2, %r12 +; AVX512BW-NEXT: addq %r11, %r12 +; AVX512BW-NEXT: vpextrq $1, %xmm2, %r11 +; AVX512BW-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Folded Reload +; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm0 +; AVX512BW-NEXT: vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero +; AVX512BW-NEXT: vmovq %xmm0, %r9 +; AVX512BW-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Folded Reload +; AVX512BW-NEXT: vpextrq $1, %xmm0, %r8 +; AVX512BW-NEXT: addq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Folded Reload +; AVX512BW-NEXT: vmovq %xmm1, %rax +; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm0 +; AVX512BW-NEXT: vmovq %xmm0, %rsi +; AVX512BW-NEXT: addq %rax, %rsi +; AVX512BW-NEXT: vpextrq $1, %xmm1, %rdi +; AVX512BW-NEXT: vpextrq $1, %xmm0, %rdx +; AVX512BW-NEXT: addq %rdi, %rdx ; AVX512BW-NEXT: addq $-1, %rbx ; AVX512BW-NEXT: movq %rbx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: movl $0, %r15d -; AVX512BW-NEXT: adcq $-1, %r15 -; AVX512BW-NEXT: addq $-1, %rbp -; AVX512BW-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: movl $0, %ebx -; AVX512BW-NEXT: adcq $-1, %rbx -; AVX512BW-NEXT: addq $-1, %rcx -; AVX512BW-NEXT: movq %rcx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: movl $0, %r11d -; AVX512BW-NEXT: adcq $-1, %r11 -; AVX512BW-NEXT: addq $-1, %r12 -; AVX512BW-NEXT: movq %r12, (%rsp) # 8-byte Spill -; AVX512BW-NEXT: movl $0, %edi -; AVX512BW-NEXT: adcq $-1, %rdi -; AVX512BW-NEXT: addq $-1, %rdx -; AVX512BW-NEXT: movq %rdx, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: movl $0, %eax -; AVX512BW-NEXT: adcq $-1, %rax -; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: addq $-1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill +; AVX512BW-NEXT: movl $0, %r10d +; AVX512BW-NEXT: adcq $-1, %r10 +; AVX512BW-NEXT: addq $-1, %r13 +; AVX512BW-NEXT: movq %r13, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill +; AVX512BW-NEXT: addq $-1, %rcx +; AVX512BW-NEXT: movq %rcx, (%rsp) # 8-byte Spill +; AVX512BW-NEXT: movl $0, %r14d +; AVX512BW-NEXT: adcq $-1, %r14 ; AVX512BW-NEXT: addq $-1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill +; AVX512BW-NEXT: movl $0, %ebx +; AVX512BW-NEXT: adcq $-1, %rbx +; AVX512BW-NEXT: addq $-1, %r15 +; AVX512BW-NEXT: movq %r15, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: movl $0, %r13d ; AVX512BW-NEXT: adcq $-1, %r13 +; AVX512BW-NEXT: addq $-1, %rbp +; AVX512BW-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill +; AVX512BW-NEXT: movl $0, %r15d +; AVX512BW-NEXT: adcq $-1, %r15 ; AVX512BW-NEXT: addq $-1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill -; AVX512BW-NEXT: movl $0, %r12d -; AVX512BW-NEXT: adcq $-1, %r12 +; AVX512BW-NEXT: movl $0, %eax +; AVX512BW-NEXT: adcq $-1, %rax +; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: addq $-1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax @@ -2779,112 +2773,114 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload -; AVX512BW-NEXT: addq $-1, %rcx +; AVX512BW-NEXT: addq $-1, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Folded Spill ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: addq $-1, %r14 +; AVX512BW-NEXT: addq $-1, %r12 ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: addq $-1, %r10 +; AVX512BW-NEXT: addq $-1, %r11 ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: addq $-1, %r9 -; AVX512BW-NEXT: movl $0, %edx -; AVX512BW-NEXT: adcq $-1, %rdx +; AVX512BW-NEXT: movl $0, %ecx +; AVX512BW-NEXT: adcq $-1, %rcx ; AVX512BW-NEXT: addq $-1, %r8 ; AVX512BW-NEXT: movl $0, %eax ; AVX512BW-NEXT: adcq $-1, %rax ; AVX512BW-NEXT: addq $-1, %rsi ; AVX512BW-NEXT: movl $0, %ebp ; AVX512BW-NEXT: adcq $-1, %rbp +; AVX512BW-NEXT: addq $-1, %rdx +; AVX512BW-NEXT: movl $0, %edi +; AVX512BW-NEXT: adcq $-1, %rdi +; AVX512BW-NEXT: shldq $63, %rdx, %rdi +; AVX512BW-NEXT: movq %rdi, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: shldq $63, %rsi, %rbp -; AVX512BW-NEXT: movq %rbp, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; AVX512BW-NEXT: shldq $63, %r8, %rax ; AVX512BW-NEXT: movq %rax, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill -; AVX512BW-NEXT: shldq $63, %r9, %rdx -; AVX512BW-NEXT: movq %rdx, %rbp -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r8 # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %r10, %r8 -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r10 # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %r14, %r10 +; AVX512BW-NEXT: shldq $63, %r9, %rcx +; AVX512BW-NEXT: movq %rcx, %r8 ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r9 # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rcx, %r9 -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r14 # 8-byte Reload +; AVX512BW-NEXT: shldq $63, %r11, %r9 +; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r11 # 8-byte Reload +; AVX512BW-NEXT: shldq $63, %r12, %r11 +; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %r12 # 8-byte Reload ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %r14 +; AVX512BW-NEXT: shldq $63, %rax, %r12 +; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload +; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdi # 8-byte Reload +; AVX512BW-NEXT: shldq $63, %rax, %rdi +; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload +; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload +; AVX512BW-NEXT: shldq $63, %rax, %rdx ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rsi # 8-byte Reload ; AVX512BW-NEXT: shldq $63, %rax, %rsi ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %r12 +; AVX512BW-NEXT: shldq $63, %rax, %r15 ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; AVX512BW-NEXT: shldq $63, %rax, %r13 ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rdx # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %rdx +; AVX512BW-NEXT: shldq $63, %rax, %rbx +; AVX512BW-NEXT: movq (%rsp), %rax # 8-byte Reload +; AVX512BW-NEXT: shldq $63, %rax, %r14 ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rcx # 8-byte Reload ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload ; AVX512BW-NEXT: shldq $63, %rax, %rcx -; AVX512BW-NEXT: movq (%rsp), %rax # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %rdi ; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %r11 -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %rbx -; AVX512BW-NEXT: movq {{[-0-9]+}}(%r{{[sb]}}p), %rax # 8-byte Reload -; AVX512BW-NEXT: shldq $63, %rax, %r15 -; AVX512BW-NEXT: vmovq %r15, %xmm0 -; AVX512BW-NEXT: vmovq %rbx, %xmm1 -; AVX512BW-NEXT: vmovq %r11, %xmm2 +; AVX512BW-NEXT: shldq $63, %rax, %r10 +; AVX512BW-NEXT: vmovq %r10, %xmm0 +; AVX512BW-NEXT: vmovq %rcx, %xmm1 ; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 -; AVX512BW-NEXT: vmovq %rdi, %xmm1 -; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm2, %ymm1 -; AVX512BW-NEXT: vinserti64x4 $1, %ymm0, %zmm1, %zmm0 ; AVX512BW-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX512BW-NEXT: vpextrb $0, %xmm0, %eax ; AVX512BW-NEXT: vmovd %eax, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm1, %eax ; AVX512BW-NEXT: vpinsrb $1, %eax, %xmm2, %xmm1 +; AVX512BW-NEXT: vmovq %r14, %xmm2 +; AVX512BW-NEXT: vmovq %rbx, %xmm3 +; AVX512BW-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vinserti64x4 $1, %ymm2, %zmm0, %zmm0 ; AVX512BW-NEXT: vextracti32x4 $2, %zmm0, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $2, %eax, %xmm1, %xmm1 ; AVX512BW-NEXT: vextracti32x4 $3, %zmm0, %xmm0 ; AVX512BW-NEXT: vpextrb $0, %xmm0, %eax ; AVX512BW-NEXT: vpinsrb $3, %eax, %xmm1, %xmm0 -; AVX512BW-NEXT: vmovq %rcx, %xmm1 -; AVX512BW-NEXT: vmovq %rdx, %xmm2 -; AVX512BW-NEXT: vmovq %r13, %xmm3 +; AVX512BW-NEXT: vmovq %r13, %xmm1 +; AVX512BW-NEXT: vmovq %r15, %xmm2 ; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1 -; AVX512BW-NEXT: vmovq %r12, %xmm2 -; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 -; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1 ; AVX512BW-NEXT: vpextrb $0, %xmm1, %eax ; AVX512BW-NEXT: vpinsrb $4, %eax, %xmm0, %xmm0 ; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $5, %eax, %xmm0, %xmm0 +; AVX512BW-NEXT: vmovq %rsi, %xmm2 +; AVX512BW-NEXT: vmovq %rdx, %xmm3 +; AVX512BW-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vextracti32x4 $2, %zmm1, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $6, %eax, %xmm0, %xmm0 ; AVX512BW-NEXT: vextracti32x4 $3, %zmm1, %xmm1 ; AVX512BW-NEXT: vpextrb $0, %xmm1, %eax ; AVX512BW-NEXT: vpinsrb $7, %eax, %xmm0, %xmm0 -; AVX512BW-NEXT: vmovq %rsi, %xmm1 -; AVX512BW-NEXT: vmovq %r14, %xmm2 -; AVX512BW-NEXT: vmovq %r9, %xmm3 +; AVX512BW-NEXT: vmovq %rdi, %xmm1 +; AVX512BW-NEXT: vmovq %r12, %xmm2 ; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1 -; AVX512BW-NEXT: vmovq %r10, %xmm2 -; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 -; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1 ; AVX512BW-NEXT: vpextrb $0, %xmm1, %eax ; AVX512BW-NEXT: vpinsrb $8, %eax, %xmm0, %xmm0 ; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $9, %eax, %xmm0, %xmm0 +; AVX512BW-NEXT: vmovq %r11, %xmm2 +; AVX512BW-NEXT: vmovq %r9, %xmm3 +; AVX512BW-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vextracti32x4 $2, %zmm1, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $10, %eax, %xmm0, %xmm0 @@ -2892,19 +2888,19 @@ define void @not_avg_v16i8_wide_constants(<16 x i8>* %a, <16 x i8>* %b) nounwind ; AVX512BW-NEXT: vpextrb $0, %xmm1, %eax ; AVX512BW-NEXT: vpinsrb $11, %eax, %xmm0, %xmm0 ; AVX512BW-NEXT: vmovq %r8, %xmm1 -; AVX512BW-NEXT: vmovq %rbp, %xmm2 -; AVX512BW-NEXT: vmovq {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 8-byte Folded Reload -; AVX512BW-NEXT: # xmm3 = mem[0],zero -; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1 ; AVX512BW-NEXT: vmovq {{[-0-9]+}}(%r{{[sb]}}p), %xmm2 # 8-byte Folded Reload ; AVX512BW-NEXT: # xmm2 = mem[0],zero -; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm3, %ymm2 -; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm2, %zmm1 +; AVX512BW-NEXT: vinserti128 $1, %xmm2, %ymm1, %ymm1 ; AVX512BW-NEXT: vpextrb $0, %xmm1, %eax ; AVX512BW-NEXT: vpinsrb $12, %eax, %xmm0, %xmm0 ; AVX512BW-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $13, %eax, %xmm0, %xmm0 +; AVX512BW-NEXT: vmovq %rbp, %xmm2 +; AVX512BW-NEXT: vmovq {{[-0-9]+}}(%r{{[sb]}}p), %xmm3 # 8-byte Folded Reload +; AVX512BW-NEXT: # xmm3 = mem[0],zero +; AVX512BW-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 +; AVX512BW-NEXT: vinserti64x4 $1, %ymm2, %zmm1, %zmm1 ; AVX512BW-NEXT: vextracti32x4 $2, %zmm1, %xmm2 ; AVX512BW-NEXT: vpextrb $0, %xmm2, %eax ; AVX512BW-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0 diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract.ll b/llvm/test/CodeGen/X86/avx512-insert-extract.ll index 6139928..9fdfeeb 100644 --- a/llvm/test/CodeGen/X86/avx512-insert-extract.ll +++ b/llvm/test/CodeGen/X86/avx512-insert-extract.ll @@ -647,7 +647,6 @@ define <16 x i16> @insert_v16i16(<16 x i16> %x, i16 %y, i16* %ptr) { ; CHECK-LABEL: insert_v16i16: ; CHECK: ## %bb.0: ; CHECK-NEXT: vpinsrw $1, (%rsi), %xmm0, %xmm1 -; CHECK-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm0[4,5,6,7] ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm0 ; CHECK-NEXT: vpinsrw $1, %edi, %xmm0, %xmm0 ; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 @@ -700,7 +699,6 @@ define <32 x i8> @insert_v32i8(<32 x i8> %x, i8 %y, i8* %ptr) { ; CHECK-LABEL: insert_v32i8: ; CHECK: ## %bb.0: ; CHECK-NEXT: vpinsrb $1, (%rsi), %xmm0, %xmm1 -; CHECK-NEXT: vpblendd {{.*#+}} ymm1 = ymm1[0,1,2,3],ymm0[4,5,6,7] ; CHECK-NEXT: vextracti128 $1, %ymm0, %xmm0 ; CHECK-NEXT: vpinsrb $1, %edi, %xmm0, %xmm0 ; CHECK-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 diff --git a/llvm/test/CodeGen/X86/vec_cast3.ll b/llvm/test/CodeGen/X86/vec_cast3.ll index 82b8c00..00c222e 100644 --- a/llvm/test/CodeGen/X86/vec_cast3.ll +++ b/llvm/test/CodeGen/X86/vec_cast3.ll @@ -130,9 +130,9 @@ define <2 x i32> @cvt_v2f32_v2u32(<2 x float> %src) { define <32 x i8> @PR40146(<4 x i64> %x) { ; CHECK-LABEL: PR40146: ; CHECK: ## %bb.0: -; CHECK-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] +; CHECK-NEXT: vpxor %xmm1, %xmm1, %xmm1 +; CHECK-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] ; CHECK-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero -; CHECK-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero ; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; CHECK-NEXT: retl %perm = shufflevector <4 x i64> %x, <4 x i64> undef, <4 x i32> -- 2.7.4