From 8fbc22e880a7a6f34a2fe4e8111b489bdd01919c Mon Sep 17 00:00:00 2001 From: Paul Berry Date: Sun, 17 Mar 2013 11:13:56 -0700 Subject: [PATCH] i965: Move brw_vs_prog_data::outputs_written into VUE map. Future patches will allow for there to be separate VUE maps when both a geometry shader and a vertex shader are in use. When this happens, we will want to have correspondingly separate outputs_written bitfields. Moving outputs_written into the VUE map will make this easy. For consistency with the terminology used in the VUE map, the bitfield is renamed to "slots_valid" in the process. Reviewed-by: Eric Anholt Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/brw_clip.c | 2 +- src/mesa/drivers/dri/i965/brw_context.h | 8 +++++++- src/mesa/drivers/dri/i965/brw_gs.c | 2 +- src/mesa/drivers/dri/i965/brw_sf.c | 2 +- src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 9 ++++----- src/mesa/drivers/dri/i965/brw_vs.c | 23 ++++++++++++----------- src/mesa/drivers/dri/i965/brw_wm.c | 2 +- 7 files changed, 27 insertions(+), 21 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_clip.c b/src/mesa/drivers/dri/i965/brw_clip.c index d411208..e20f7c2 100644 --- a/src/mesa/drivers/dri/i965/brw_clip.c +++ b/src/mesa/drivers/dri/i965/brw_clip.c @@ -146,7 +146,7 @@ brw_upload_clip_prog(struct brw_context *brw) /* BRW_NEW_REDUCED_PRIMITIVE */ key.primitive = brw->intel.reduced_primitive; /* CACHE_NEW_VS_PROG (also part of VUE map) */ - key.attrs = brw->vs.prog_data->outputs_written; + key.attrs = brw->vs.prog_data->vue_map.slots_valid; /* _NEW_LIGHT */ key.do_flat_shading = (ctx->Light.ShadeModel == GL_FLAT); key.pv_first = (ctx->Light.ProvokingVertex == GL_FIRST_VERTEX_CONVENTION); diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index 1ceb40f..83604e5 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -355,6 +355,13 @@ typedef enum */ struct brw_vue_map { /** + * Bitfield representing all varying slots that are (a) stored in this VUE + * map, and (b) actually written by the shader. Does not include any of + * the additional varying slots defined in brw_varying_slot. + */ + GLbitfield64 slots_valid; + + /** * Map from gl_varying_slot value to VUE slot. For gl_varying_slots that are * not stored in a slot (because they are not written, or because * additional processing is applied before storing them in the VUE), the @@ -438,7 +445,6 @@ struct brw_vs_prog_data { GLuint curb_read_length; GLuint urb_read_length; GLuint total_grf; - GLbitfield64 outputs_written; GLuint nr_params; /**< number of float params/constants */ GLuint nr_pull_params; /**< number of dwords referenced by pull_param[] */ GLuint total_scratch; diff --git a/src/mesa/drivers/dri/i965/brw_gs.c b/src/mesa/drivers/dri/i965/brw_gs.c index 7118dc7..00a2a5d 100644 --- a/src/mesa/drivers/dri/i965/brw_gs.c +++ b/src/mesa/drivers/dri/i965/brw_gs.c @@ -167,7 +167,7 @@ static void populate_key( struct brw_context *brw, memset(key, 0, sizeof(*key)); /* CACHE_NEW_VS_PROG (part of VUE map) */ - key->attrs = brw->vs.prog_data->outputs_written; + key->attrs = brw->vs.prog_data->vue_map.slots_valid; /* BRW_NEW_PRIMITIVE */ key->primitive = brw->primitive; diff --git a/src/mesa/drivers/dri/i965/brw_sf.c b/src/mesa/drivers/dri/i965/brw_sf.c index 3740cb9..8e6c91c 100644 --- a/src/mesa/drivers/dri/i965/brw_sf.c +++ b/src/mesa/drivers/dri/i965/brw_sf.c @@ -145,7 +145,7 @@ brw_upload_sf_prog(struct brw_context *brw) /* Populate the key, noting state dependencies: */ /* CACHE_NEW_VS_PROG */ - key.attrs = brw->vs.prog_data->outputs_written; + key.attrs = brw->vs.prog_data->vue_map.slots_valid; /* BRW_NEW_REDUCED_PRIMITIVE */ switch (brw->intel.reduced_primitive) { diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp index 371551e..d3ca06f 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp @@ -2402,7 +2402,7 @@ void vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) { if (intel->gen < 6 && - ((c->prog_data.outputs_written & BITFIELD64_BIT(VARYING_SLOT_PSIZ)) || + ((c->prog_data.vue_map.slots_valid & VARYING_BIT_PSIZ) || c->key.userclip_active || brw->has_negative_rhw_bug)) { dst_reg header1 = dst_reg(this, glsl_type::uvec4_type); dst_reg header1_w = header1; @@ -2411,7 +2411,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) emit(MOV(header1, 0u)); - if (c->prog_data.outputs_written & BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { + if (c->prog_data.vue_map.slots_valid & VARYING_BIT_PSIZ) { src_reg psiz = src_reg(output_reg[VARYING_SLOT_PSIZ]); current_annotation = "Point size"; @@ -2456,7 +2456,7 @@ vec4_visitor::emit_psiz_and_flags(struct brw_reg reg) emit(MOV(retype(reg, BRW_REGISTER_TYPE_UD), 0u)); } else { emit(MOV(retype(reg, BRW_REGISTER_TYPE_D), src_reg(0))); - if (c->prog_data.outputs_written & BITFIELD64_BIT(VARYING_SLOT_PSIZ)) { + if (c->prog_data.vue_map.slots_valid & VARYING_BIT_PSIZ) { emit(MOV(brw_writemask(reg, WRITEMASK_W), src_reg(output_reg[VARYING_SLOT_PSIZ]))); } @@ -2487,8 +2487,7 @@ vec4_visitor::emit_clip_distances(struct brw_reg reg, int offset) * if the user wrote to it; otherwise we use gl_Position. */ gl_varying_slot clip_vertex = VARYING_SLOT_CLIP_VERTEX; - if (!(c->prog_data.outputs_written - & BITFIELD64_BIT(VARYING_SLOT_CLIP_VERTEX))) { + if (!(c->prog_data.vue_map.slots_valid & VARYING_BIT_CLIP_VERTEX)) { clip_vertex = VARYING_SLOT_POS; } diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 9bcb5e3..fceabba 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -58,11 +58,12 @@ static inline void assign_vue_slot(struct brw_vue_map *vue_map, * (generated by CACHE_NEW_VS_PROG). */ static void -brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c) +brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c, + GLbitfield64 slots_valid) { const struct intel_context *intel = &brw->intel; struct brw_vue_map *vue_map = &c->prog_data.vue_map; - GLbitfield64 outputs_written = c->prog_data.outputs_written; + vue_map->slots_valid = slots_valid; int i; vue_map->num_slots = 0; @@ -125,13 +126,13 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c) * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing * two-sided color. */ - if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_COL0)) + if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0)) assign_vue_slot(vue_map, VARYING_SLOT_COL0); - if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0)) + if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0)) assign_vue_slot(vue_map, VARYING_SLOT_BFC0); - if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_COL1)) + if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1)) assign_vue_slot(vue_map, VARYING_SLOT_COL1); - if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1)) + if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1)) assign_vue_slot(vue_map, VARYING_SLOT_BFC1); break; default: @@ -152,7 +153,7 @@ brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c) for (int i = 0; i < VARYING_SLOT_MAX; ++i) { if (intel->gen < 6 && i == VARYING_SLOT_CLIP_VERTEX) continue; - if ((outputs_written & BITFIELD64_BIT(i)) && + if ((slots_valid & BITFIELD64_BIT(i)) && vue_map->varying_to_slot[i] == -1) { assign_vue_slot(vue_map, i); } @@ -250,11 +251,11 @@ do_vs_prog(struct brw_context *brw, c.prog_data.param = rzalloc_array(NULL, const float *, param_count); c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count); - c.prog_data.outputs_written = vp->program.Base.OutputsWritten; + GLbitfield64 outputs_written = vp->program.Base.OutputsWritten; c.prog_data.inputs_read = vp->program.Base.InputsRead; if (c.key.copy_edgeflag) { - c.prog_data.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE); c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG; } @@ -267,11 +268,11 @@ do_vs_prog(struct brw_context *brw, */ for (i = 0; i < 8; i++) { if (c.key.point_coord_replace & (1 << i)) - c.prog_data.outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); + outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i); } } - brw_compute_vue_map(brw, &c); + brw_compute_vue_map(brw, &c, outputs_written); if (0) { _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG, diff --git a/src/mesa/drivers/dri/i965/brw_wm.c b/src/mesa/drivers/dri/i965/brw_wm.c index bec8d85..e7e9ddc 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.c +++ b/src/mesa/drivers/dri/i965/brw_wm.c @@ -481,7 +481,7 @@ static void brw_wm_populate_key( struct brw_context *brw, /* CACHE_NEW_VS_PROG */ if (intel->gen < 6) - key->vp_outputs_written = brw->vs.prog_data->outputs_written; + key->vp_outputs_written = brw->vs.prog_data->vue_map.slots_valid; /* The unique fragment program ID */ key->program_string_id = fp->id; -- 2.7.4