From 8f8ee5b95b6342baa0b601ac8422090ddf0bb486 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Mon, 5 Oct 2020 15:41:33 +0200 Subject: [PATCH] ac,radv,radeonsi: stop multiplying driver_location by 4 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit It's no longer needed to do that. Signed-off-by: Samuel Pitoiset Reviewed-by: Marek Olšák Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/llvm/ac_nir_to_llvm.c | 6 +++--- src/amd/vulkan/radv_nir_to_llvm.c | 8 ++++---- src/gallium/drivers/radeonsi/si_shader_llvm_gs.c | 2 +- src/gallium/drivers/radeonsi/si_shader_llvm_tess.c | 4 ---- 4 files changed, 8 insertions(+), 12 deletions(-) diff --git a/src/amd/llvm/ac_nir_to_llvm.c b/src/amd/llvm/ac_nir_to_llvm.c index 7a4f6ba..c125f7a 100644 --- a/src/amd/llvm/ac_nir_to_llvm.c +++ b/src/amd/llvm/ac_nir_to_llvm.c @@ -2168,7 +2168,7 @@ static void visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr * LLVMValueRef vertex_index = vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL; ctx->abi->store_tcs_outputs(ctx->abi, vertex_index, indir_index, src, - writemask, component, base * 4); + writemask, component, base); return; } @@ -3149,7 +3149,7 @@ static LLVMValueRef visit_load(struct ac_nir_context *ctx, nir_intrinsic_instr * (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) { LLVMValueRef result = ctx->abi->load_tess_varyings(ctx->abi, component_type, vertex_index, indir_index, - base * 4, component, + base, component, count, !is_output); if (instr->dest.ssa.bit_size == 16) { result = ac_to_integer(&ctx->ac, result); @@ -3164,7 +3164,7 @@ static LLVMValueRef visit_load(struct ac_nir_context *ctx, nir_intrinsic_instr * if (ctx->stage == MESA_SHADER_GEOMETRY) { assert(nir_src_is_const(*vertex_index_src)); - return ctx->abi->load_inputs(ctx->abi, base * 4, component, count, + return ctx->abi->load_inputs(ctx->abi, base, component, count, nir_src_as_uint(*vertex_index_src), component_type); } diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index 5837450..a0d87eb 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -512,7 +512,7 @@ load_tcs_varyings(struct ac_shader_abi *abi, struct radv_shader_context *ctx = radv_shader_context_from_abi(abi); LLVMValueRef dw_addr, stride; LLVMValueRef value[4], result; - unsigned param = shader_io_get_unique_index(driver_location / 4); + unsigned param = shader_io_get_unique_index(driver_location); bool is_patch = vertex_index == NULL; @@ -551,7 +551,7 @@ store_tcs_output(struct ac_shader_abi *abi, unsigned driver_location) { struct radv_shader_context *ctx = radv_shader_context_from_abi(abi); - const unsigned location = driver_location / 4; + const unsigned location = driver_location; const bool is_patch = vertex_index == NULL; LLVMValueRef dw_addr; LLVMValueRef stride = NULL; @@ -625,7 +625,7 @@ load_tes_input(struct ac_shader_abi *abi, LLVMValueRef buf_addr; LLVMValueRef result; LLVMValueRef oc_lds = ac_get_arg(&ctx->ac, ctx->args->oc_lds); - unsigned param = shader_io_get_unique_index(driver_location / 4); + unsigned param = shader_io_get_unique_index(driver_location); buf_addr = get_tcs_tes_buffer_address_params(ctx, param, vertex_index, param_index); @@ -656,7 +656,7 @@ load_gs_input(struct ac_shader_abi *abi, vtx_offset = LLVMBuildMul(ctx->ac.builder, ctx->gs_vtx_offset[vtx_offset_param], LLVMConstInt(ctx->ac.i32, 4, false), ""); - param = shader_io_get_unique_index(driver_location / 4); + param = shader_io_get_unique_index(driver_location); for (unsigned i = component; i < num_components + component; i++) { if (ctx->ac.chip_class >= GFX9) { diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c b/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c index 8defef8..7c6bd60 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_gs.c @@ -104,7 +104,7 @@ static LLVMValueRef si_nir_load_input_gs(struct ac_shader_abi *abi, LLVMValueRef value[4]; for (unsigned i = component; i < component + num_components; i++) { - value[i] = si_llvm_load_input_gs(&ctx->abi, driver_location / 4, + value[i] = si_llvm_load_input_gs(&ctx->abi, driver_location, vertex_index, type, i); } diff --git a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c index 45419c4..5bb4b3c 100644 --- a/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c +++ b/src/gallium/drivers/radeonsi/si_shader_llvm_tess.c @@ -386,8 +386,6 @@ static LLVMValueRef si_nir_load_tcs_varyings(struct ac_shader_abi *abi, LLVMType LLVMValueRef dw_addr, stride; ubyte semantic; - driver_location = driver_location / 4; - if (load_input) { semantic = info->input_semantic[driver_location]; } else { @@ -436,7 +434,6 @@ static LLVMValueRef si_nir_load_input_tes(struct ac_shader_abi *abi, LLVMTypeRef struct si_shader_info *info = &ctx->shader->selector->info; LLVMValueRef base, addr; - driver_location = driver_location / 4; ubyte semantic = info->input_semantic[driver_location]; assert((semantic >= VARYING_SLOT_PATCH0 || @@ -475,7 +472,6 @@ static void si_nir_store_output_tcs(struct ac_shader_abi *abi, LLVMValueRef values[8]; bool is_tess_factor = false, is_tess_inner = false; - driver_location = driver_location / 4; ubyte semantic = info->output_semantic[driver_location]; bool is_const = !param_index; -- 2.7.4