From 8ed1730ccd6cf2a84243456e371a5f4484be60f5 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Sun, 8 Nov 2015 11:28:26 +1000 Subject: [PATCH] drm/nouveau/nvif: split out fifo interface definitions Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/include/nvif/cl006b.h | 11 +++ drivers/gpu/drm/nouveau/include/nvif/cl506e.h | 12 +++ drivers/gpu/drm/nouveau/include/nvif/cl506f.h | 13 ++++ drivers/gpu/drm/nouveau/include/nvif/cl826e.h | 14 ++++ drivers/gpu/drm/nouveau/include/nvif/cl826f.h | 15 ++++ drivers/gpu/drm/nouveau/include/nvif/cl906f.h | 14 ++++ drivers/gpu/drm/nouveau/include/nvif/cla06f.h | 21 ++++++ drivers/gpu/drm/nouveau/include/nvif/class.h | 87 +++------------------- drivers/gpu/drm/nouveau/nouveau_abi16.c | 1 + drivers/gpu/drm/nouveau/nouveau_chan.c | 4 + drivers/gpu/drm/nouveau/nouveau_drm.c | 1 + drivers/gpu/drm/nouveau/nouveau_fence.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c | 2 +- drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c | 3 +- drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c | 1 + drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c | 1 + .../gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c | 3 +- .../gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c | 1 + .../gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c | 1 + .../gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c | 1 + 23 files changed, 132 insertions(+), 78 deletions(-) create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl006b.h create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl506e.h create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl506f.h create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl826e.h create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl826f.h create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cl906f.h create mode 100644 drivers/gpu/drm/nouveau/include/nvif/cla06f.h diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl006b.h b/drivers/gpu/drm/nouveau/include/nvif/cl006b.h new file mode 100644 index 0000000..309ab8a --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl006b.h @@ -0,0 +1,11 @@ +#ifndef __NVIF_CL006B_H__ +#define __NVIF_CL006B_H__ + +struct nv03_channel_dma_v0 { + __u8 version; + __u8 chid; + __u8 pad02[2]; + __u32 offset; + __u64 pushbuf; +}; +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl506e.h b/drivers/gpu/drm/nouveau/include/nvif/cl506e.h new file mode 100644 index 0000000..aa94b8c --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl506e.h @@ -0,0 +1,12 @@ +#ifndef __NVIF_CL506E_H__ +#define __NVIF_CL506E_H__ + +struct nv50_channel_dma_v0 { + __u8 version; + __u8 chid; + __u8 pad02[6]; + __u64 vm; + __u64 pushbuf; + __u64 offset; +}; +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl506f.h b/drivers/gpu/drm/nouveau/include/nvif/cl506f.h new file mode 100644 index 0000000..3b71019 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl506f.h @@ -0,0 +1,13 @@ +#ifndef __NVIF_CL506F_H__ +#define __NVIF_CL506F_H__ + +struct nv50_channel_gpfifo_v0 { + __u8 version; + __u8 chid; + __u8 pad02[2]; + __u32 ilength; + __u64 ioffset; + __u64 pushbuf; + __u64 vm; +}; +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl826e.h b/drivers/gpu/drm/nouveau/include/nvif/cl826e.h new file mode 100644 index 0000000..05e6ef7 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl826e.h @@ -0,0 +1,14 @@ +#ifndef __NVIF_CL826E_H__ +#define __NVIF_CL826E_H__ + +struct g82_channel_dma_v0 { + __u8 version; + __u8 chid; + __u8 pad02[6]; + __u64 vm; + __u64 pushbuf; + __u64 offset; +}; + +#define G82_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl826f.h b/drivers/gpu/drm/nouveau/include/nvif/cl826f.h new file mode 100644 index 0000000..cecafcb --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl826f.h @@ -0,0 +1,15 @@ +#ifndef __NVIF_CL826F_H__ +#define __NVIF_CL826F_H__ + +struct g82_channel_gpfifo_v0 { + __u8 version; + __u8 chid; + __u8 pad02[2]; + __u32 ilength; + __u64 ioffset; + __u64 pushbuf; + __u64 vm; +}; + +#define G82_CHANNEL_GPFIFO_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cl906f.h b/drivers/gpu/drm/nouveau/include/nvif/cl906f.h new file mode 100644 index 0000000..2caf083 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cl906f.h @@ -0,0 +1,14 @@ +#ifndef __NVIF_CL906F_H__ +#define __NVIF_CL906F_H__ + +struct fermi_channel_gpfifo_v0 { + __u8 version; + __u8 chid; + __u8 pad02[2]; + __u32 ilength; + __u64 ioffset; + __u64 vm; +}; + +#define FERMI_CHANNEL_GPFIFO_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/cla06f.h b/drivers/gpu/drm/nouveau/include/nvif/cla06f.h new file mode 100644 index 0000000..85b7827 --- /dev/null +++ b/drivers/gpu/drm/nouveau/include/nvif/cla06f.h @@ -0,0 +1,21 @@ +#ifndef __NVIF_CLA06F_H__ +#define __NVIF_CLA06F_H__ + +struct kepler_channel_gpfifo_a_v0 { + __u8 version; +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR 0x01 +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_MSPDEC 0x02 +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_MSPPP 0x04 +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_MSVLD 0x08 +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0 0x10 +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1 0x20 +#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_ENC 0x40 + __u8 engine; + __u16 chid; + __u32 ilength; + __u64 ioffset; + __u64 vm; +}; + +#define KEPLER_CHANNEL_GPFIFO_A_V0_NTFY_UEVENT 0x00 +#endif diff --git a/drivers/gpu/drm/nouveau/include/nvif/class.h b/drivers/gpu/drm/nouveau/include/nvif/class.h index aa1e063..9076aa7 100644 --- a/drivers/gpu/drm/nouveau/include/nvif/class.h +++ b/drivers/gpu/drm/nouveau/include/nvif/class.h @@ -26,18 +26,18 @@ #define NV04_DISP /* cl0046.h */ 0x00000046 -#define NV03_CHANNEL_DMA 0x0000006b -#define NV10_CHANNEL_DMA 0x0000006e -#define NV17_CHANNEL_DMA 0x0000176e -#define NV40_CHANNEL_DMA 0x0000406e -#define NV50_CHANNEL_DMA 0x0000506e -#define G82_CHANNEL_DMA 0x0000826e - -#define NV50_CHANNEL_GPFIFO 0x0000506f -#define G82_CHANNEL_GPFIFO 0x0000826f -#define FERMI_CHANNEL_GPFIFO 0x0000906f -#define KEPLER_CHANNEL_GPFIFO_A 0x0000a06f -#define MAXWELL_CHANNEL_GPFIFO_A 0x0000b06f +#define NV03_CHANNEL_DMA /* cl506b.h */ 0x0000006b +#define NV10_CHANNEL_DMA /* cl506b.h */ 0x0000006e +#define NV17_CHANNEL_DMA /* cl506b.h */ 0x0000176e +#define NV40_CHANNEL_DMA /* cl506b.h */ 0x0000406e +#define NV50_CHANNEL_DMA /* cl506e.h */ 0x0000506e +#define G82_CHANNEL_DMA /* cl826e.h */ 0x0000826e + +#define NV50_CHANNEL_GPFIFO /* cl506f.h */ 0x0000506f +#define G82_CHANNEL_GPFIFO /* cl826f.h */ 0x0000826f +#define FERMI_CHANNEL_GPFIFO /* cl906f.h */ 0x0000906f +#define KEPLER_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000a06f +#define MAXWELL_CHANNEL_GPFIFO_A /* cla06f.h */ 0x0000b06f #define NV50_DISP /* cl5070.h */ 0x00005070 #define G82_DISP /* cl5070.h */ 0x00008270 @@ -389,67 +389,4 @@ struct nvif_control_pstate_user_v0 { __s8 pwrsrc; /* in: target power source */ __u8 pad03[5]; }; - - -/******************************************************************************* - * DMA FIFO channels - ******************************************************************************/ - -struct nv03_channel_dma_v0 { - __u8 version; - __u8 chid; - __u8 pad02[2]; - __u32 offset; - __u64 pushbuf; -}; - -struct nv50_channel_dma_v0 { - __u8 version; - __u8 chid; - __u8 pad02[6]; - __u64 vm; - __u64 pushbuf; - __u64 offset; -}; - -#define G82_CHANNEL_DMA_V0_NTFY_UEVENT 0x00 - -/******************************************************************************* - * GPFIFO channels - ******************************************************************************/ - -struct nv50_channel_gpfifo_v0 { - __u8 version; - __u8 chid; - __u8 pad02[2]; - __u32 ilength; - __u64 ioffset; - __u64 pushbuf; - __u64 vm; -}; - -struct fermi_channel_gpfifo_v0 { - __u8 version; - __u8 chid; - __u8 pad02[2]; - __u32 ilength; - __u64 ioffset; - __u64 vm; -}; - -struct kepler_channel_gpfifo_a_v0 { - __u8 version; -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR 0x01 -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_MSPDEC 0x02 -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_MSPPP 0x04 -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_MSVLD 0x08 -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0 0x10 -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1 0x20 -#define KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_ENC 0x40 - __u8 engine; - __u16 chid; - __u32 ilength; - __u64 ioffset; - __u64 vm; -}; #endif diff --git a/drivers/gpu/drm/nouveau/nouveau_abi16.c b/drivers/gpu/drm/nouveau/nouveau_abi16.c index a6afeaf..6efb149 100644 --- a/drivers/gpu/drm/nouveau/nouveau_abi16.c +++ b/drivers/gpu/drm/nouveau/nouveau_abi16.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include "nouveau_drm.h" diff --git a/drivers/gpu/drm/nouveau/nouveau_chan.c b/drivers/gpu/drm/nouveau/nouveau_chan.c index 0a853ad..d9c784c 100644 --- a/drivers/gpu/drm/nouveau/nouveau_chan.c +++ b/drivers/gpu/drm/nouveau/nouveau_chan.c @@ -24,6 +24,10 @@ #include #include +#include +#include +#include +#include #include /*XXX*/ diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c b/drivers/gpu/drm/nouveau/nouveau_drm.c index e82545c..fc45bde 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drm.c +++ b/drivers/gpu/drm/nouveau/nouveau_drm.c @@ -37,6 +37,7 @@ #include #include +#include #include #include "nouveau_drm.h" diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 574c36b..9a8c5b7 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c @@ -30,6 +30,7 @@ #include #include +#include #include #include diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c index 0430524..aeb3387 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/chang84.c @@ -28,7 +28,7 @@ #include #include -#include +#include int g84_fifo_chan_ntfy(struct nvkm_fifo_chan *chan, u32 type, diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c index a5ca52c..4091727 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmag84.c @@ -27,6 +27,7 @@ #include #include +#include #include static int @@ -35,7 +36,7 @@ g84_fifo_dma_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, { struct nvkm_object *parent = oclass->parent; union { - struct nv50_channel_dma_v0 v0; + struct g82_channel_dma_v0 v0; } *args = data; struct nv50_fifo *fifo = nv50_fifo(base); struct nv50_fifo_chan *chan; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c index bfcc640..51af281 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv04.c @@ -29,6 +29,7 @@ #include #include +#include #include void diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c index 34f68e5..e676af4 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv10.c @@ -29,6 +29,7 @@ #include #include +#include #include static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c index ed7cc9f..ee364e2 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv17.c @@ -29,6 +29,7 @@ #include #include +#include #include static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c index 043b6c3..c75a41e 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv40.c @@ -29,6 +29,7 @@ #include #include +#include #include static bool diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c index 6b3b15f..982bed0 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/dmanv50.c @@ -27,6 +27,7 @@ #include #include +#include #include static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c index 82013236..e463100 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifog84.c @@ -27,6 +27,7 @@ #include #include +#include #include static int @@ -35,7 +36,7 @@ g84_fifo_gpfifo_new(struct nvkm_fifo *base, const struct nvkm_oclass *oclass, { struct nvkm_object *parent = oclass->parent; union { - struct nv50_channel_gpfifo_v0 v0; + struct g82_channel_gpfifo_v0 v0; } *args = data; struct nv50_fifo *fifo = nv50_fifo(base); struct nv50_fifo_chan *chan; diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c index 3f37675..8db9cf01 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogf100.c @@ -29,6 +29,7 @@ #include #include +#include #include static u32 diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c index 500e7d2..ba2bfe5 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifogk104.c @@ -30,6 +30,7 @@ #include #include +#include #include static int diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c index a8c69f8..94456ca 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gpfifonv50.c @@ -27,6 +27,7 @@ #include #include +#include #include static int -- 2.7.4