From 8ea6696c003ce548a9684c9c0dc049266fa2cd87 Mon Sep 17 00:00:00 2001 From: Evoke Zhang Date: Thu, 27 Dec 2018 17:17:47 +0800 Subject: [PATCH] lcd: update panel parameters for tl1 [1/1] PD#SWPL-3109 Problem: tl1 tcon parameters need update Solution: 1.update tcon parameters for tl1 2.add minilvds support Verify: x301 Change-Id: Ia9c1defb25f43b2b352400e2ab55c6a74b55d688 Signed-off-by: Evoke Zhang --- arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi | 145 +++++++++++++++----- arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi | 150 ++++++++++++++++----- arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi | 150 ++++++++++++++++----- .../arm/boot/dts/amlogic/mesontxlx_r311-panel.dtsi | 12 +- .../arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi | 145 +++++++++++++++----- .../boot/dts/amlogic/mesontl1_t309-panel.dtsi | 150 ++++++++++++++++----- .../boot/dts/amlogic/mesontl1_x301-panel.dtsi | 150 ++++++++++++++++----- drivers/amlogic/media/vout/lcd/lcd_clk_config.c | 67 ++++----- drivers/amlogic/media/vout/lcd/lcd_debug.c | 69 +++++++--- drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c | 75 +++-------- drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.c | 52 +++++++ drivers/amlogic/media/vout/lcd/lcd_vout.c | 4 +- include/linux/amlogic/media/vout/lcd/lcd_vout.h | 6 +- 13 files changed, 851 insertions(+), 324 deletions(-) diff --git a/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi index 57d2023..7f2cccc 100644 --- a/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi @@ -79,9 +79,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -121,9 +119,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -165,7 +161,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable */ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -207,7 +203,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -218,10 +214,10 @@ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; - p2p{ + p2p_0{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -244,32 +240,29 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ - 3 2 0 200 /* extern init voltage */ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; p2p_1{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -292,31 +285,29 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; p2p_2{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -339,31 +330,29 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; p2p_3{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -386,24 +375,108 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x12304567 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x45603012 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; diff --git a/arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi index b9fbc12..d43d679 100644 --- a/arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontl1_t309-panel.dtsi @@ -88,9 +88,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -133,9 +131,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -177,9 +173,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -223,7 +217,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable */ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = <0 0 1 50 /*panel power on*/ @@ -265,7 +259,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -309,7 +303,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -353,7 +347,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -399,7 +393,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -414,10 +408,10 @@ 0xff 0 0 0>; /*ending*/ backlight_index = <2>; }; - p2p{ + p2p_0{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -440,15 +434,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -465,7 +459,7 @@ p2p_1{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -488,15 +482,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -512,7 +506,7 @@ p2p_2{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -535,15 +529,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -559,7 +553,7 @@ p2p_3{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -582,15 +576,105 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x12304567 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x45603012 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < diff --git a/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi index 6bdceda..d16f107 100644 --- a/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontl1_x301-panel.dtsi @@ -91,9 +91,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -136,9 +134,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -180,9 +176,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -226,7 +220,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable */ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = <0 0 1 50 /*panel power on*/ @@ -268,7 +262,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -312,7 +306,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -356,7 +350,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -402,7 +396,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -417,10 +411,10 @@ 0xff 0 0 0>; /*ending*/ backlight_index = <2>; }; - p2p{ + p2p_0{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -443,15 +437,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -468,7 +462,7 @@ p2p_1{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -491,15 +485,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -515,7 +509,7 @@ p2p_2{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -538,15 +532,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -562,7 +556,7 @@ p2p_3{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -585,15 +579,105 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x12304567 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x45603012 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < diff --git a/arch/arm/boot/dts/amlogic/mesontxlx_r311-panel.dtsi b/arch/arm/boot/dts/amlogic/mesontxlx_r311-panel.dtsi index 73df626..73ed979 100644 --- a/arch/arm/boot/dts/amlogic/mesontxlx_r311-panel.dtsi +++ b/arch/arm/boot/dts/amlogic/mesontxlx_r311-panel.dtsi @@ -687,9 +687,9 @@ 1 0 /*on_value, off_value*/ 200 200>; /*on_delay(ms), off_delay(ms)*/ bl_ldim_region_row_col = <1 10>; - bl_ldim_mode = <1>; /*1=single_side - * (top, bottom, left or right), - *2=uniform(top/bottom, left/right) + bl_ldim_mode = <1>; /*0=left/right side + *1=top/bottom side + *2=direct */ ldim_dev_index = <2>; }; @@ -704,9 +704,9 @@ 1 0 /*on_value, off_value*/ 200 200>; /* on_delay(ms), off_delay(ms)*/ bl_ldim_region_row_col = <1 1>; - bl_ldim_mode = <1>; /*1=single_side - * (top, bottom, left or right), - *2=uniform(top/bottom, left/right) + bl_ldim_mode = <1>; /*0=left/right side + *1=top/bottom side + *2=direct */ ldim_dev_index = <1>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi index 1e8393d..41375bfc 100644 --- a/arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontl1_skt-panel.dtsi @@ -79,9 +79,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -121,9 +119,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -165,7 +161,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable */ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -207,7 +203,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -218,10 +214,10 @@ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; - p2p{ + p2p_0{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -244,32 +240,29 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ - 3 2 0 200 /* extern init voltage */ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; p2p_1{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -292,31 +285,29 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; p2p_2{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -339,31 +330,29 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; p2p_3{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -386,24 +375,108 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x12304567 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x45603012 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < - 0 0 1 20 /*panel power on*/ 2 0 0 10 /*signal enable*/ 0xff 0 0 0>; /*ending*/ power_off_step = < 2 0 0 10 /*signal disable*/ - 0 0 0 100 /*panel power off*/ 0xff 0 0 0>; /*ending*/ backlight_index = <0xff>; }; diff --git a/arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi index 71ed28e..bedb295 100644 --- a/arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontl1_t309-panel.dtsi @@ -88,9 +88,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -133,9 +131,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -177,9 +173,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -223,7 +217,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable */ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = <0 0 1 50 /*panel power on*/ @@ -265,7 +259,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -309,7 +303,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -353,7 +347,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -399,7 +393,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -414,10 +408,10 @@ 0xff 0 0 0>; /*ending*/ backlight_index = <2>; }; - p2p{ + p2p_0{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -440,15 +434,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -465,7 +459,7 @@ p2p_1{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -488,15 +482,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -512,7 +506,7 @@ p2p_2{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -535,15 +529,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -559,7 +553,7 @@ p2p_3{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -582,15 +576,105 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x12304567 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x45603012 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < diff --git a/arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi b/arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi index dec7069..1869dc5 100644 --- a/arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi +++ b/arch/arm64/boot/dts/amlogic/mesontl1_x301-panel.dtsi @@ -91,9 +91,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -136,9 +134,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -180,9 +176,7 @@ 0 /*pn_swap*/ 0 /*port_swap*/ 0>; /*lane_reverse*/ - phy_attr=< - 3 0 /*vswing_level, preem_level*/ - 0 0>; /*clk vswing_level, preem_level*/ + phy_attr=<0xf 0>; /*vswing_level, preem_level*/ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -226,7 +220,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable */ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /* vswing_level, preem_level */ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = <0 0 1 50 /*panel power on*/ @@ -268,7 +262,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -312,7 +306,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -356,7 +350,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -402,7 +396,7 @@ vbyone_intr_enable = < 1 /*vbyone_intr_enable*/ 3>; /*vbyone_vsync_intr_enable*/ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -417,10 +411,10 @@ 0xff 0 0 0>; /*ending*/ backlight_index = <2>; }; - p2p{ + p2p_0{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -443,15 +437,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -468,7 +462,7 @@ p2p_1{ model_name = "p2p_ceds"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -491,15 +485,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 0 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi + 0 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -515,7 +509,7 @@ p2p_2{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -538,15 +532,15 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 6 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < @@ -562,7 +556,7 @@ p2p_3{ model_name = "p2p_chpi"; interface = "p2p"; /*lcd_interface - *(lvds, vbyone, mlvds, p2p) + *(lvds, vbyone, minilvds, p2p) */ basic_setting = < 3840 2160 /*h_active, v_active*/ @@ -585,15 +579,105 @@ 1 /*clk_auto_generate*/ 0>; /*pixel_clk(unit in Hz)*/ p2p_attr = < - 4 /* teyp: 0=ceds, 1=cspi, 2=cmpi, 3=isp, - * 4=chpi - */ + 10 /* teyp: 0=ceds, 1=cmpi, 2=isp, 3=epi, + * 10=chpi, 11=cspi, 12=usit + */ 12 /* channel_num */ 0x76543210 /* channel_sel0 */ 0xba98 /* channel_sel1 */ 0 /* pn_swap */ 0>; /* bit_swap */ - phy_attr=<3 0>; /*vswing_level, preem_level*/ + phy_attr=<0xf 1>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_0{ + model_name = "mlvds_1080p"; + interface = "minilvds"; /*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1920 1080 /*h_active, v_active*/ + 2200 1125 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 2080 2720 /*h_period_min, max*/ + 2200 1125 /*v_period_min, max*/ + 133940000 156000000>; /*pclk_min, max*/ + lcd_timing = < + 44 148 0 /*hs_width, hs_bp, hs_pol*/ + 5 30 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x12304567 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ + + /* power step: type, index, value, delay(ms) */ + power_on_step = < + 0 0 1 20 /*panel power on*/ + 2 0 0 10 /*signal enable*/ + 0xff 0 0 0>; /*ending*/ + power_off_step = < + 2 0 0 10 /*signal disable*/ + 0 0 0 100 /*panel power off*/ + 0xff 0 0 0>; /*ending*/ + backlight_index = <0xff>; + }; + mlvds_1{ + model_name = "mlvds_768p"; + interface = "minilvds";/*lcd_interface + *(lvds, vbyone, minilvds, p2p) + */ + basic_setting = < + 1366 768 /*h_active, v_active*/ + 1560 806 /*h_period, v_period*/ + 8 /*lcd_bits */ + 16 9>; /*screen_widht, screen_height*/ + range_setting = < + 1460 2000 /*h_period_min, max*/ + 784 1015 /*v_period_min, max*/ + 50000000 85000000>; /*pclk_min, max*/ + lcd_timing = < + 56 64 0 /*hs_width, hs_bp, hs_pol*/ + 3 28 0>; /*vs_width, vs_bp, vs_pol*/ + clk_attr = < + 2 /*fr_adj_type + *(0=clk, 1=htotal, 2=vtotal, 3=auto_range, + * 4=hdmi_mode) + */ + 0 /*clk_ss_level*/ + 1 /*clk_auto_generate*/ + 0>; /*pixel_clk(unit in Hz)*/ + minilvds_attr = < + 6 /* channel_num */ + 0x45603012 /* channel_sel0 */ + 0x0 /* channel_sel1 */ + 0xaa0 /* clk_phase */ + 0 /* pn_swap */ + 0>; /* bit_swap */ + phy_attr=<0xf 0>; /* vswing_level, preem_level */ /* power step: type, index, value, delay(ms) */ power_on_step = < diff --git a/drivers/amlogic/media/vout/lcd/lcd_clk_config.c b/drivers/amlogic/media/vout/lcd/lcd_clk_config.c index 0752873..f30ef40 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_clk_config.c +++ b/drivers/amlogic/media/vout/lcd/lcd_clk_config.c @@ -512,12 +512,13 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf) { #if 1 unsigned int pll_ctrl, pll_ctrl1; - unsigned int tcon_div_table[5][3] = { - {1, 0, 1}, - {0, 0, 1}, - {0, 1, 1}, - {0, 0, 0}, - {0, 1, 0}, + unsigned int tcon_div[5][3] = { + /* div_mux, div2/4_sel, div4_bypass */ + {1, 0, 1}, /* div1 */ + {0, 0, 1}, /* div2 */ + {0, 1, 1}, /* div4 */ + {0, 0, 0}, /* div8 */ + {0, 1, 0}, /* div16 */ }; unsigned int tcon_div_sel = cConf->pll_tcon_div_sel; int ret; @@ -525,15 +526,15 @@ static void lcd_set_pll_tl1(struct lcd_clk_config_s *cConf) if (lcd_debug_print_flag == 2) LCDPR("%s\n", __func__); pll_ctrl = ((0x3 << 17) | /* gate ctrl */ - (tcon_div_table[tcon_div_sel][2] << 16) | + (tcon_div[tcon_div_sel][2] << 16) | (cConf->pll_n << LCD_PLL_N_TL1) | (cConf->pll_m << LCD_PLL_M_TL1) | (cConf->pll_od3_sel << LCD_PLL_OD3_TL1) | (cConf->pll_od2_sel << LCD_PLL_OD2_TL1) | (cConf->pll_od1_sel << LCD_PLL_OD1_TL1)); pll_ctrl1 = (1 << 28) | - (tcon_div_table[tcon_div_sel][0] << 22) | - (tcon_div_table[tcon_div_sel][1] << 21) | + (tcon_div[tcon_div_sel][0] << 22) | + (tcon_div[tcon_div_sel][1] << 21) | ((1 << 20) | /* sdm_en */ (cConf->pll_frac << 0)); @@ -1193,26 +1194,28 @@ static void lcd_clk_generate_txl(struct lcd_config_s *pconf) break; case LCD_MLVDS: bit_rate = pconf->lcd_control.mlvds_config->bit_rate / 1000; - for (tcon_div_sel = 1; tcon_div_sel < 3; tcon_div_sel++) { - pll_fvco = bit_rate * tcon_div_table[tcon_div_sel] * 4; + /* must go through div4 for clk phase */ + for (tcon_div_sel = 3; tcon_div_sel < 5; tcon_div_sel++) { + pll_fvco = bit_rate * tcon_div_table[tcon_div_sel]; done = check_pll_vco(cConf, pll_fvco); - if (done) { - clk_div_sel = CLK_DIV_SEL_1; - cConf->xd_max = CRT_VID_DIV_MAX; - for (xd = 1; xd <= cConf->xd_max; xd++) { - clk_div_out = cConf->fout * xd; - if (clk_div_out > - cConf->data->div_out_fmax) - continue; - if (lcd_debug_print_flag == 2) { - LCDPR("fout=%d, xd=%d\n", - cConf->fout, xd); - LCDPR("clk_div_out=%d\n", - clk_div_out); - } + if (done == 0) + continue; + cConf->xd_max = CRT_VID_DIV_MAX; + for (xd = 1; xd <= cConf->xd_max; xd++) { + clk_div_out = cConf->fout * xd; + if (clk_div_out > cConf->data->div_out_fmax) + continue; + if (lcd_debug_print_flag == 2) { + LCDPR( + "fout=%d, xd=%d, clk_div_out=%d\n", + cConf->fout, xd, clk_div_out); + } + for (clk_div_sel = CLK_DIV_SEL_1; + clk_div_sel < CLK_DIV_SEL_MAX; + clk_div_sel++) { clk_div_in = clk_vid_pll_div_calc( - clk_div_out, - clk_div_sel, CLK_DIV_O2I); + clk_div_out, clk_div_sel, + CLK_DIV_O2I); if (clk_div_in > cConf->data->div_in_fmax) continue; @@ -1222,13 +1225,11 @@ static void lcd_clk_generate_txl(struct lcd_config_s *pconf) pll_fout = clk_div_in; if (lcd_debug_print_flag == 2) { LCDPR("clk_div_sel=%s(%d)\n", - lcd_clk_div_sel_table[ - clk_div_sel], + lcd_clk_div_sel_table[clk_div_sel], clk_div_sel); - LCDPR("pll_fout=%d\n", - pll_fout); - LCDPR("tcon_div_sel=%d\n", - tcon_div_sel); + LCDPR( + "pll_fout=%d, tcon_div_sel=%d\n", + pll_fout, tcon_div_sel); } done = check_pll_od(cConf, pll_fout); if (done) diff --git a/drivers/amlogic/media/vout/lcd/lcd_debug.c b/drivers/amlogic/media/vout/lcd/lcd_debug.c index 4d4e1ae..e53ae22 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_debug.c +++ b/drivers/amlogic/media/vout/lcd/lcd_debug.c @@ -596,6 +596,34 @@ static int lcd_info_print(char *buf, int offset) return len; } +static void lcd_reg_print_serializer(char *buf, int offset) +{ + struct aml_lcd_drv_s *lcd_drv = aml_lcd_get_driver(); + unsigned int reg0, reg1; + int n, len = 0; + + switch (lcd_drv->data->chip_type) { + case LCD_CHIP_TL1: + reg0 = HHI_LVDS_TX_PHY_CNTL0_TL1; + reg1 = HHI_LVDS_TX_PHY_CNTL1_TL1; + break; + default: + reg0 = HHI_LVDS_TX_PHY_CNTL0; + reg1 = HHI_LVDS_TX_PHY_CNTL1; + break; + } + + n = lcd_debug_info_len(len + offset); + len += snprintf((buf+len), n, "\nserializer regs:\n"); + n = lcd_debug_info_len(len + offset); + len += snprintf((buf+len), n, + "HHI_LVDS_TX_PHY_CNTL0 [0x%04x] = 0x%08x\n", + reg0, lcd_hiu_read(reg0)); + len += snprintf((buf+len), n, + "HHI_LVDS_TX_PHY_CNTL1 [0x%04x] = 0x%08x\n", + reg1, lcd_hiu_read(reg1)); +} + static int lcd_reg_print_ttl(char *buf, int offset) { unsigned int reg; @@ -677,6 +705,8 @@ static int lcd_reg_print_lvds(char *buf, int offset) unsigned int reg; int n, len = 0; + lcd_reg_print_serializer((buf+len), (len+offset)); + n = lcd_debug_info_len(len + offset); len += snprintf((buf+len), n, "\nlvds regs:\n"); n = lcd_debug_info_len(len + offset); @@ -694,16 +724,6 @@ static int lcd_reg_print_lvds(char *buf, int offset) len += snprintf((buf+len), n, "LCD_PORT_SWAP [0x%04x] = 0x%08x\n", reg, lcd_vcbus_read(reg)); - n = lcd_debug_info_len(len + offset); - reg = HHI_LVDS_TX_PHY_CNTL0; - len += snprintf((buf+len), n, - "LVDS_PHY_CNTL0 [0x%04x] = 0x%08x\n", - reg, lcd_hiu_read(reg)); - n = lcd_debug_info_len(len + offset); - reg = HHI_LVDS_TX_PHY_CNTL1; - len += snprintf((buf+len), n, - "LVDS_PHY_CNTL1 [0x%04x] = 0x%08x\n", - reg, lcd_hiu_read(reg)); return len; } @@ -713,6 +733,8 @@ static int lcd_reg_print_vbyone(char *buf, int offset) unsigned int reg; int n, len = 0; + lcd_reg_print_serializer((buf+len), (len+offset)); + n = lcd_debug_info_len(len + offset); len += snprintf((buf+len), n, "\nvbyone regs:\n"); n = lcd_debug_info_len(len + offset); @@ -757,11 +779,6 @@ static int lcd_reg_print_vbyone(char *buf, int offset) len += snprintf((buf+len), n, "VX1_INTR_STATE [0x%04x] = 0x%08x\n", reg, lcd_vcbus_read(reg)); - n = lcd_debug_info_len(len + offset); - reg = HHI_LVDS_TX_PHY_CNTL0; - len += snprintf((buf+len), n, - "VX1_PHY_CNTL0 [0x%04x] = 0x%08x\n", - reg, lcd_hiu_read(reg)); return len; } @@ -852,6 +869,8 @@ static int lcd_reg_print_mlvds(char *buf, int offset) unsigned int reg; int n, len = 0; + lcd_reg_print_serializer((buf+len), (len+offset)); + n = lcd_debug_info_len(len + offset); len += snprintf((buf+len), n, "\nmlvds regs:\n"); @@ -963,6 +982,8 @@ static int lcd_reg_print_p2p(char *buf, int offset) unsigned int reg; int n, len = 0; + lcd_reg_print_serializer((buf+len), (len+offset)); + n = lcd_debug_info_len(len + offset); len += snprintf((buf+len), n, "\np2p regs:\n"); @@ -3483,6 +3504,11 @@ static void lcd_phy_config_update(unsigned int *para, int cnt) unsigned int data32, vswing, preem, ext_pullup; unsigned int rinner_table[] = {0xa, 0xa, 0x6, 0x4}; + if (lcd_drv->data->chip_type == LCD_CHIP_TL1) { + LCDPR("%s: not support yet\n", __func__); + return; + } + pconf = lcd_drv->lcd_config; type = pconf->lcd_basic.lcd_type; switch (type) { @@ -3677,31 +3703,30 @@ static ssize_t lcd_phy_debug_show(struct class *class, preem = pconf->lcd_control.lvds_config->phy_preem; clk_vswing = pconf->lcd_control.lvds_config->phy_clk_vswing; clk_preem = pconf->lcd_control.lvds_config->phy_clk_preem; - len += sprintf(buf+len, "%s:\n", __func__); + len += sprintf(buf+len, "vswing=0x%x, preemphasis=0x%x\n", vswing, preem); - len += sprintf(buf+len, - "clk_vswing=0x%x, clk_preemphasis=0x%x\n", - clk_vswing, clk_preem); + if (lcd_drv->data->chip_type <= LCD_CHIP_TXLX) { + len += sprintf(buf+len, + "clk_vswing=0x%x, clk_preemphasis=0x%x\n", + clk_vswing, clk_preem); + } break; case LCD_VBYONE: vswing = pconf->lcd_control.vbyone_config->phy_vswing; preem = pconf->lcd_control.vbyone_config->phy_preem; - len += sprintf(buf+len, "%s:\n", __func__); len += sprintf(buf+len, "vswing=0x%x, preemphasis=0x%x\n", vswing, preem); break; case LCD_MLVDS: vswing = pconf->lcd_control.mlvds_config->phy_vswing; preem = pconf->lcd_control.mlvds_config->phy_preem; - len += sprintf(buf+len, "%s:\n", __func__); len += sprintf(buf+len, "vswing=0x%x, preemphasis=0x%x\n", vswing, preem); break; case LCD_P2P: vswing = pconf->lcd_control.p2p_config->phy_vswing; preem = pconf->lcd_control.p2p_config->phy_preem; - len += sprintf(buf+len, "%s:\n", __func__); len += sprintf(buf+len, "vswing=0x%x, preemphasis=0x%x\n", vswing, preem); break; diff --git a/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c b/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c index 848f4f2..8f85c3f 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c +++ b/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_drv.c @@ -595,13 +595,16 @@ static void lcd_lvds_disable(void) lcd_vcbus_setb(LVDS_GEN_CNTL, 0, 3, 1); /* disable lvds fifo */ } -static void lcd_mlvds_clk_util_set(struct lcd_config_s *pconf) +static void lcd_mlvds_control_set(struct lcd_config_s *pconf) { - unsigned int lcd_bits, div_sel; + unsigned int div_sel; + unsigned int channel_sel0, channel_sel1; - lcd_bits = pconf->lcd_basic.lcd_bits; + if (lcd_debug_print_flag) + LCDPR("%s\n", __func__); - switch (lcd_bits) { + /* phy_div: 0=div6, 1=div 7, 2=div8, 3=div10 */ + switch (pconf->lcd_basic.lcd_bits) { case 6: div_sel = 0; break; @@ -613,60 +616,24 @@ static void lcd_mlvds_clk_util_set(struct lcd_config_s *pconf) break; } - /* set fifo_clk_sel */ + /* fifo_clk_sel[7:6]: 0=div6, 1=div 7, 2=div8, 3=div10 */ lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL0, (div_sel << 6)); - /* set cntl_ser_en: 8-channel to 1 */ + /* serializer_en[27:16] */ lcd_hiu_setb(HHI_LVDS_TX_PHY_CNTL0, 0xfff, 16, 12); + /* pn swap[2] */ + lcd_hiu_setb(HHI_LVDS_TX_PHY_CNTL0, 1, 2, 1); - /* decoupling fifo enable, gated clock enable */ - lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL1, - (1 << 30) | (0 << 25) | (1 << 24)); - /* decoupling fifo write enable after fifo enable */ + /* fifo enable[30], phy_clock gating[24] */ + lcd_hiu_write(HHI_LVDS_TX_PHY_CNTL1, (1 << 30) | (1 << 24)); + /* fifo write enable[31] */ lcd_hiu_setb(HHI_LVDS_TX_PHY_CNTL1, 1, 31, 1); -} - -static void lcd_mlvds_control_set(struct lcd_config_s *pconf) -{ - unsigned int bit_num = 1; - - if (lcd_debug_print_flag) - LCDPR("%s\n", __func__); - - lcd_mlvds_clk_util_set(pconf); - - switch (pconf->lcd_basic.lcd_bits) { - case 10: - bit_num = 0; - break; - case 8: - bit_num = 1; - break; - case 6: - bit_num = 2; - break; - case 4: - bit_num = 3; - break; - default: - bit_num = 1; - break; - } - - lcd_vcbus_write(LVDS_PACK_CNTL_ADDR, - (1 << 0) | // repack //[1:0] - (0 << 3) | // reserve - (0 << 4) | // lsb first - (0 << 5) | // pn swap - (1 << 6) | // dual port - (0 << 7) | // use tcon control - (bit_num << 8) | // 0:10bits, 1:8bits, 2:6bits, 3:4bits. - (0 << 10) | //r_select //0:R, 1:G, 2:B, 3:0 - (1 << 12) | //g_select //0:R, 1:G, 2:B, 3:0 - (2 << 14)); //b_select //0:R, 1:G, 2:B, 3:0; - lcd_vcbus_write(LVDS_GEN_CNTL, - (lcd_vcbus_read(LVDS_GEN_CNTL) | (1 << 4) | (0x3 << 0))); - lcd_vcbus_setb(LVDS_GEN_CNTL, 1, 3, 1); + /* channel swap default no swap */ + channel_sel0 = pconf->lcd_control.mlvds_config->channel_sel0; + channel_sel1 = pconf->lcd_control.mlvds_config->channel_sel1; + lcd_vcbus_write(LVDS_CH_SWAP0, (channel_sel0 & 0xff)); + lcd_vcbus_write(LVDS_CH_SWAP1, ((channel_sel0 >> 8) & 0xff)); + lcd_vcbus_write(LVDS_CH_SWAP2, (channel_sel1 & 0xff)); lcd_tcon_enable(pconf); } @@ -674,8 +641,6 @@ static void lcd_mlvds_control_set(struct lcd_config_s *pconf) static void lcd_mlvds_disable(void) { lcd_tcon_disable(); - - lcd_vcbus_setb(LVDS_GEN_CNTL, 0, 3, 1); /* disable lvds fifo */ } #if 0 diff --git a/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.c b/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.c index 581cc1d..58ced6c 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.c +++ b/drivers/amlogic/media/vout/lcd/lcd_tv/lcd_tv.c @@ -810,6 +810,7 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf, struct device_node *child; struct lvds_config_s *lvdsconf; struct vbyone_config_s *vx1_conf; + struct mlvds_config_s *mlvds_conf; struct p2p_config_s *p2p_conf; child = of_get_child_by_name(dev->of_node, pconf->lcd_propname); @@ -1015,6 +1016,35 @@ static int lcd_config_load_from_dts(struct lcd_config_s *pconf, } } break; + case LCD_MLVDS: + mlvds_conf = pconf->lcd_control.mlvds_config; + ret = of_property_read_u32_array(child, "minilvds_attr", + ¶[0], 6); + if (ret) { + LCDERR("failed to get minilvds_attr\n"); + } else { + mlvds_conf->channel_num = para[0]; + mlvds_conf->channel_sel0 = para[1]; + mlvds_conf->channel_sel1 = para[2]; + mlvds_conf->clk_phase = para[3]; + mlvds_conf->pn_swap = para[4]; + mlvds_conf->bit_swap = para[5]; + } + ret = of_property_read_u32_array(child, "phy_attr", + ¶[0], 2); + if (ret) { + if (lcd_debug_print_flag) + LCDPR("failed to get phy_attr\n"); + } else { + mlvds_conf->phy_vswing = para[0]; + mlvds_conf->phy_preem = para[1]; + if (lcd_debug_print_flag) { + LCDPR("phy vswing=0x%x, preem=0x%x\n", + mlvds_conf->phy_vswing, + mlvds_conf->phy_preem); + } + } + break; case LCD_P2P: p2p_conf = pconf->lcd_control.p2p_config; ret = of_property_read_u32_array(child, "p2p_attr", @@ -1064,6 +1094,7 @@ static int lcd_config_load_from_unifykey(struct lcd_config_s *pconf) struct aml_lcd_unifykey_header_s lcd_header; struct lvds_config_s *lvdsconf = pconf->lcd_control.lvds_config; struct vbyone_config_s *vx1_conf = pconf->lcd_control.vbyone_config; + struct mlvds_config_s *mlvds_conf = pconf->lcd_control.mlvds_config; struct p2p_config_s *p2p_conf = pconf->lcd_control.p2p_config; int ret; @@ -1239,6 +1270,27 @@ static int lcd_config_load_from_unifykey(struct lcd_config_s *pconf) ((*(p + LCD_UKEY_IF_ATTR_7 + 1)) << 8)) & 0xff; lvdsconf->lane_reverse = 0; } + } else if (pconf->lcd_basic.lcd_type == LCD_MLVDS) { + mlvds_conf->channel_num = (*(p + LCD_UKEY_IF_ATTR_0) | + ((*(p + LCD_UKEY_IF_ATTR_0 + 1)) << 8)) & 0xff; + mlvds_conf->channel_sel0 = (*(p + LCD_UKEY_IF_ATTR_1) | + ((*(p + LCD_UKEY_IF_ATTR_1 + 1)) << 8) | + (*(p + LCD_UKEY_IF_ATTR_2) << 16) | + ((*(p + LCD_UKEY_IF_ATTR_2 + 1)) << 24)); + mlvds_conf->channel_sel1 = (*(p + LCD_UKEY_IF_ATTR_3) | + ((*(p + LCD_UKEY_IF_ATTR_3 + 1)) << 8) | + (*(p + LCD_UKEY_IF_ATTR_4) << 16) | + ((*(p + LCD_UKEY_IF_ATTR_4 + 1)) << 24)); + mlvds_conf->clk_phase = (*(p + LCD_UKEY_IF_ATTR_5) | + ((*(p + LCD_UKEY_IF_ATTR_5 + 1)) << 8)); + mlvds_conf->pn_swap = (*(p + LCD_UKEY_IF_ATTR_6) | + ((*(p + LCD_UKEY_IF_ATTR_6 + 1)) << 8)) & 0xff; + mlvds_conf->bit_swap = (*(p + LCD_UKEY_IF_ATTR_7) | + ((*(p + LCD_UKEY_IF_ATTR_7 + 1)) << 8)) & 0xff; + mlvds_conf->phy_vswing = (*(p + LCD_UKEY_IF_ATTR_8) | + ((*(p + LCD_UKEY_IF_ATTR_8 + 1)) << 8)) & 0xff; + mlvds_conf->phy_preem = (*(p + LCD_UKEY_IF_ATTR_9) | + ((*(p + LCD_UKEY_IF_ATTR_9 + 1)) << 8)) & 0xff; } else if (pconf->lcd_basic.lcd_type == LCD_P2P) { p2p_conf->p2p_type = (*(p + LCD_UKEY_IF_ATTR_0) | ((*(p + LCD_UKEY_IF_ATTR_0 + 1)) << 8)); diff --git a/drivers/amlogic/media/vout/lcd/lcd_vout.c b/drivers/amlogic/media/vout/lcd/lcd_vout.c index 10db108..c4eaff1 100644 --- a/drivers/amlogic/media/vout/lcd/lcd_vout.c +++ b/drivers/amlogic/media/vout/lcd/lcd_vout.c @@ -117,9 +117,9 @@ static struct vbyone_config_s lcd_vbyone_config = { }; static struct mlvds_config_s lcd_mlvds_config = { - .channel_num = 12, + .channel_num = 6, .channel_sel0 = 0x76543210, - .channel_sel1 = 0xba98, + .channel_sel1 = 0, .clk_phase = 0, .pn_swap = 0, .bit_swap = 0, diff --git a/include/linux/amlogic/media/vout/lcd/lcd_vout.h b/include/linux/amlogic/media/vout/lcd/lcd_vout.h index 0097b78..6af1d85c 100644 --- a/include/linux/amlogic/media/vout/lcd/lcd_vout.h +++ b/include/linux/amlogic/media/vout/lcd/lcd_vout.h @@ -339,10 +339,12 @@ struct mlvds_config_s { enum p2p_type_e { P2P_CEDS = 0, - P2P_CSPI, P2P_CMPI, P2P_ISP, - P2P_CHPI, + P2P_EPI, + P2P_CHPI = 10, /* low common mode */ + P2P_CSPI, + P2P_USIT, P2P_MAX, }; -- 2.7.4