From 8e740c3c0db11ce7f36b4724dfd61716f3c9fe30 Mon Sep 17 00:00:00 2001 From: "Alexander Efimov/AI Tools Lab/./Samsung Electronics" Date: Mon, 30 Sep 2019 05:24:01 +0300 Subject: [PATCH] Rename cpu backend Shape (#5534) Rename cpu backend Shape class into TensorDescriptor Signed-off-by: Efimov Alexander --- runtimes/neurun/backend/cpu/KernelGenerator.cc | 153 +++++++++++---------- runtimes/neurun/backend/cpu/kernel/AddLayer.cc | 22 +-- runtimes/neurun/backend/cpu/kernel/AddLayer.h | 13 +- runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc | 31 +++-- runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h | 8 +- runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc | 35 ++--- runtimes/neurun/backend/cpu/kernel/ConcatLayer.h | 8 +- .../neurun/backend/cpu/kernel/ConvolutionLayer.cc | 47 +++---- .../neurun/backend/cpu/kernel/ConvolutionLayer.h | 18 +-- .../cpu/kernel/DepthwiseConvolutionLayer.cc | 57 ++++---- .../backend/cpu/kernel/DepthwiseConvolutionLayer.h | 17 +-- .../backend/cpu/kernel/FullyConnectedLayer.cc | 48 +++---- .../backend/cpu/kernel/FullyConnectedLayer.h | 15 +- runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc | 31 +++-- runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h | 8 +- .../neurun/backend/cpu/kernel/OperationUtils.cc | 53 +++---- .../neurun/backend/cpu/kernel/OperationUtils.h | 35 ++--- runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc | 12 +- runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h | 8 +- runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc | 49 +++---- runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h | 8 +- 21 files changed, 349 insertions(+), 327 deletions(-) diff --git a/runtimes/neurun/backend/cpu/KernelGenerator.cc b/runtimes/neurun/backend/cpu/KernelGenerator.cc index 5d6fe3c..a69af3d 100644 --- a/runtimes/neurun/backend/cpu/KernelGenerator.cc +++ b/runtimes/neurun/backend/cpu/KernelGenerator.cc @@ -88,14 +88,14 @@ void KernelGenerator::visit(const model::operation::Conv2DNode &node) stride, ker_width, ker_height); const auto activation = node.param().activation; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout); - const auto ker_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ker_index), model::Layout::UNKNOWN); - const auto bias_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(bias_index), model::Layout::UNKNOWN); + const auto ofm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ofm_index), _current_subg_layout); + const auto ifm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ifm_index), _current_subg_layout); + const auto ker_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(ker_index), model::Layout::UNKNOWN); + const auto bias_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(bias_index), model::Layout::UNKNOWN); auto ofm_alloc = _tensor_builder->at(ofm_index); auto ifm_alloc = _tensor_builder->at(ifm_index); @@ -104,10 +104,10 @@ void KernelGenerator::visit(const model::operation::Conv2DNode &node) auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::ConvolutionLayer>(); - fn->configure(ifm_alloc->buffer(), ifm_backend_shape, ker_alloc->buffer(), ker_backend_shape, - bias_alloc->buffer(), bias_backend_shape, padding.left, padding.right, padding.top, + fn->configure(ifm_alloc->buffer(), ifm_backend_descr, ker_alloc->buffer(), ker_backend_descr, + bias_alloc->buffer(), bias_backend_descr, padding.left, padding.right, padding.top, padding.bottom, stride.horizontal, stride.vertical, activation, ofm_alloc->buffer(), - ofm_backend_shape); + ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -131,14 +131,14 @@ void KernelGenerator::visit(const model::operation::DepthwiseConv2DNode &node) const auto padding = neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, ker_width, ker_height); - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout); - const auto ker_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ker_index), model::Layout::UNKNOWN); - const auto bias_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(bias_index), model::Layout::UNKNOWN); + const auto ofm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ofm_index), _current_subg_layout); + const auto ifm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ifm_index), _current_subg_layout); + const auto ker_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(ker_index), model::Layout::UNKNOWN); + const auto bias_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(bias_index), model::Layout::UNKNOWN); const auto multiplier = node.param().multiplier; const auto activation = node.param().activation; @@ -150,10 +150,10 @@ void KernelGenerator::visit(const model::operation::DepthwiseConv2DNode &node) auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::DepthwiseConvolutionLayer>(); - fn->configure(ifm_alloc->buffer(), ifm_backend_shape, ker_alloc->buffer(), ker_backend_shape, - bias_alloc->buffer(), bias_backend_shape, padding.left, padding.right, padding.top, + fn->configure(ifm_alloc->buffer(), ifm_backend_descr, ker_alloc->buffer(), ker_backend_descr, + bias_alloc->buffer(), bias_backend_descr, padding.left, padding.right, padding.top, padding.bottom, stride.horizontal, stride.vertical, multiplier, activation, - ofm_alloc->buffer(), ofm_backend_shape); + ofm_alloc->buffer(), ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -173,19 +173,19 @@ void KernelGenerator::visit(const model::operation::MaxPool2DNode &node) neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh); const auto activation = node.param().activation; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout); + const auto ofm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ofm_index), _current_subg_layout); + const auto ifm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ifm_index), _current_subg_layout); auto ofm_alloc = _tensor_builder->at(ofm_index).get(); auto ifm_alloc = _tensor_builder->at(ifm_index).get(); auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::MaxPoolLayer>(); - fn->configure(ifm_alloc->buffer(), ifm_backend_shape, padding.left, padding.right, padding.top, + fn->configure(ifm_alloc->buffer(), ifm_backend_descr, padding.left, padding.right, padding.top, padding.bottom, stride.horizontal, stride.vertical, kw, kh, activation, - ofm_alloc->buffer(), ofm_backend_shape); + ofm_alloc->buffer(), ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -204,19 +204,19 @@ void KernelGenerator::visit(const model::operation::AvgPool2DNode &node) neurun::util::calculatePadding(node.param().padding, ifm_shape, ofm_shape, stride, kw, kh); const auto activation = node.param().activation; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ifm_index), _current_subg_layout); + const auto ofm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ofm_index), _current_subg_layout); + const auto ifm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ifm_index), _current_subg_layout); auto ofm_alloc = _tensor_builder->at(ofm_index).get(); auto ifm_alloc = _tensor_builder->at(ifm_index).get(); auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::AvgPoolLayer>(); - fn->configure(ifm_alloc->buffer(), ifm_backend_shape, padding.left, padding.right, padding.top, + fn->configure(ifm_alloc->buffer(), ifm_backend_descr, padding.left, padding.right, padding.top, padding.bottom, stride.horizontal, stride.vertical, kw, kh, activation, - ofm_alloc->buffer(), ofm_backend_shape); + ofm_alloc->buffer(), ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -229,12 +229,12 @@ void KernelGenerator::visit(const model::operation::ConcatNode &node) const auto axis = ::neurun::backend::cpu::kernel::getAxis(rank, node.param().axis, _current_subg_layout); - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout); - std::vector<::neurun::backend::cpu::kernel::Shape> ifm_backend_shapes; + const auto ofm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ofm_index), _current_subg_layout); + std::vector<::neurun::backend::cpu::kernel::TensorDescriptor> ifm_backend_descrs; for (auto &in_idx : node.getInputs()) - ifm_backend_shapes.emplace_back( - ::neurun::backend::cpu::kernel::getShape(_ctx.at(in_idx), _current_subg_layout)); + ifm_backend_descrs.emplace_back( + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(in_idx), _current_subg_layout)); auto output_alloc = _tensor_builder->at(ofm_index).get(); @@ -244,7 +244,7 @@ void KernelGenerator::visit(const model::operation::ConcatNode &node) auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::ConcatLayer>(); - fn->configure(input_buffers, ifm_backend_shapes, axis, output_alloc->buffer(), ofm_backend_shape); + fn->configure(input_buffers, ifm_backend_descrs, axis, output_alloc->buffer(), ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -258,14 +258,14 @@ void KernelGenerator::visit(const model::operation::FullyConnectedNode &node) const auto weight_index{node.getInputs().at(FullyConnectedNode::Input::WEIGHT)}; const auto bias_index{node.getInputs().at(FullyConnectedNode::Input::BIAS)}; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(output_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(input_index), _current_subg_layout); - const auto weight_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(weight_index), model::Layout::UNKNOWN); - const auto bias_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(bias_index), model::Layout::UNKNOWN); + const auto ofm_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(output_index), _current_subg_layout); + const auto ifm_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(input_index), _current_subg_layout); + const auto weight_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(weight_index), model::Layout::UNKNOWN); + const auto bias_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(bias_index), model::Layout::UNKNOWN); const auto activation = node.param().activation; @@ -276,9 +276,9 @@ void KernelGenerator::visit(const model::operation::FullyConnectedNode &node) auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::FullyConnectedLayer>(); - fn->configure(input_alloc->buffer(), ifm_backend_shape, weight_alloc->buffer(), - weight_backend_shape, bias_alloc->buffer(), bias_backend_shape, activation, - output_alloc->buffer(), ofm_backend_shape); + fn->configure(input_alloc->buffer(), ifm_backend_descr, weight_alloc->buffer(), + weight_backend_descr, bias_alloc->buffer(), bias_backend_descr, activation, + output_alloc->buffer(), ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -290,18 +290,18 @@ void KernelGenerator::visit(const model::operation::ReshapeNode &node) const auto output_index{node.getOutputs().at(0)}; const auto input_index{node.getInputs().at(model::operation::ReshapeNode::Input::INPUT)}; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(output_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(input_index), _current_subg_layout); + const auto ofm_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(output_index), _current_subg_layout); + const auto ifm_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(input_index), _current_subg_layout); auto output_alloc = _tensor_builder->at(output_index).get(); auto input_alloc = _tensor_builder->at(input_index).get(); auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::ReshapeLayer>(); - fn->configure(input_alloc->buffer(), ifm_backend_shape, output_alloc->buffer(), - ofm_backend_shape); + fn->configure(input_alloc->buffer(), ifm_backend_descr, output_alloc->buffer(), + ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -311,10 +311,10 @@ void KernelGenerator::visit(const model::operation::SoftmaxNode &node) const auto output_index{node.getOutputs().at(0)}; const auto input_index{node.getInputs().at(model::operation::SoftmaxNode::Input::INPUT)}; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(output_index), _current_subg_layout); - const auto ifm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(input_index), _current_subg_layout); + const auto ofm_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(output_index), _current_subg_layout); + const auto ifm_backend_descr = ::neurun::backend::cpu::kernel::getTensorDescriptor( + _ctx.at(input_index), _current_subg_layout); const auto beta = node.param().beta; @@ -323,8 +323,8 @@ void KernelGenerator::visit(const model::operation::SoftmaxNode &node) auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::SoftMaxLayer>(); - fn->configure(input_alloc->buffer(), ifm_backend_shape, beta, output_alloc->buffer(), - ofm_backend_shape); + fn->configure(input_alloc->buffer(), ifm_backend_descr, beta, output_alloc->buffer(), + ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -335,12 +335,12 @@ void KernelGenerator::visit(const model::operation::AddNode &node) const auto lhs_index{node.getInputs().at(model::operation::AddNode::Input::LHS)}; const auto rhs_index{node.getInputs().at(model::operation::AddNode::Input::RHS)}; - const auto ofm_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(ofm_index), _current_subg_layout); - const auto lhs_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(lhs_index), _current_subg_layout); - const auto rhs_backend_shape = - ::neurun::backend::cpu::kernel::getShape(_ctx.at(rhs_index), _current_subg_layout); + const auto ofm_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(ofm_index), _current_subg_layout); + const auto lhs_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(lhs_index), _current_subg_layout); + const auto rhs_backend_descr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(_ctx.at(rhs_index), _current_subg_layout); const auto activation = node.param().activation; @@ -350,8 +350,8 @@ void KernelGenerator::visit(const model::operation::AddNode &node) auto fn = nnfw::cpp14::make_unique<::neurun::backend::cpu::kernel::AddLayer>(); - fn->configure(lhs_alloc->buffer(), lhs_backend_shape, rhs_alloc->buffer(), rhs_backend_shape, - activation, ofm_alloc->buffer(), ofm_backend_shape); + fn->configure(lhs_alloc->buffer(), lhs_backend_descr, rhs_alloc->buffer(), rhs_backend_descr, + activation, ofm_alloc->buffer(), ofm_backend_descr); _execution_builder->append(std::move(fn)); } @@ -413,15 +413,16 @@ void KernelGenerator::visit(const model::operation::PermuteNode &node) void KernelGenerator::visit(const model::operation::CustomNode &node) { auto get_type_info = [this](const model::Operand &operand) -> custom::TypeInfo { - auto backendShape = ::neurun::backend::cpu::kernel::getShape(operand, _current_subg_layout); + auto backendDescr = + ::neurun::backend::cpu::kernel::getTensorDescriptor(operand, _current_subg_layout); - custom::Shape shape(backendShape.dimensions.size()); - for (size_t d = 0; d < backendShape.dimensions.size(); ++d) + custom::Shape shape(backendDescr.dimensions.size()); + for (size_t d = 0; d < backendDescr.dimensions.size(); ++d) { - shape.dim(d) = backendShape.dimensions[d]; + shape.dim(d) = backendDescr.dimensions[d]; } - return {shape, backendShape.type}; + return {shape, backendDescr.type}; }; auto fill_op_info = [&](const model::OperandIndexSequence &opSeq, diff --git a/runtimes/neurun/backend/cpu/kernel/AddLayer.cc b/runtimes/neurun/backend/cpu/kernel/AddLayer.cc index 14e2afe..af4adfc 100644 --- a/runtimes/neurun/backend/cpu/kernel/AddLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/AddLayer.cc @@ -37,15 +37,15 @@ void AddLayer::addFloat32() op_params.float_activation_max = output_activation_max; op_params.float_activation_min = output_activation_min; - nnfw::cker::Add(op_params, convertShapeToCkerShape(_lhsShape), _lhsData.f, - convertShapeToCkerShape(_rhsShape), _rhsData.f, - convertShapeToCkerShape(_outputShape), _outputData.f); + nnfw::cker::Add(op_params, convertTensorDescriptorToCkerShape(_lhsDescr), _lhsData.f, + convertTensorDescriptorToCkerShape(_rhsDescr), _rhsData.f, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.f); } void AddLayer::addQuant8() { int32_t output_activation_min, output_activation_max; - CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min, + CalculateActivationRangeUint8(_activation, _outputDescr, &output_activation_min, &output_activation_max); // nnfw::cker::AddParam op_params; // op_params.quantized_activation_max = output_activation_max; @@ -55,18 +55,18 @@ void AddLayer::addQuant8() throw std::runtime_error{"NYI"}; } -void AddLayer::configure(uint8_t *lhsData, const Shape &lhsShape, uint8_t *rhsData, - const Shape &rhsShape, const model::Activation activation, - uint8_t *outputData, const Shape &outputShape) +void AddLayer::configure(uint8_t *lhsData, const TensorDescriptor &lhsDescr, uint8_t *rhsData, + const TensorDescriptor &rhsDescr, const model::Activation activation, + uint8_t *outputData, const TensorDescriptor &outputDescr) { _lhsData.u8 = lhsData; - _lhsShape = lhsShape; + _lhsDescr = lhsDescr; _rhsData.u8 = rhsData; - _rhsShape = rhsShape; - _inputType = lhsShape.type; + _rhsDescr = rhsDescr; + _inputType = lhsDescr.type; _activation = activation; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void AddLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/AddLayer.h b/runtimes/neurun/backend/cpu/kernel/AddLayer.h index e7ac391..cf933c6 100644 --- a/runtimes/neurun/backend/cpu/kernel/AddLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/AddLayer.h @@ -33,7 +33,7 @@ namespace kernel class AddLayer : public ::neurun::exec::IFunction { public: - AddLayer() : _lhsData(), _rhsData(), _outputData(), _lhsShape(), _rhsShape(), _outputShape() + AddLayer() : _lhsData(), _rhsData(), _outputData(), _lhsDescr(), _rhsDescr(), _outputDescr() { // DO NOTHING } @@ -43,8 +43,9 @@ public: void addQuant8(); - void configure(uint8_t *lhsData, const Shape &lhsShape, uint8_t *rhsData, const Shape &rhsShape, - const model::Activation activation, uint8_t *outputData, const Shape &outputShape); + void configure(uint8_t *lhsData, const TensorDescriptor &lhsDescr, uint8_t *rhsData, + const TensorDescriptor &rhsDescr, const model::Activation activation, + uint8_t *outputData, const TensorDescriptor &outputDescr); void run(); void runSync() @@ -59,9 +60,9 @@ private: DataPtr _rhsData; DataPtr _outputData; - Shape _lhsShape; - Shape _rhsShape; - Shape _outputShape; + TensorDescriptor _lhsDescr; + TensorDescriptor _rhsDescr; + TensorDescriptor _outputDescr; model::Activation _activation{model::Activation::NONE}; diff --git a/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc index de43aae..2020f69 100644 --- a/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.cc @@ -40,7 +40,7 @@ namespace kernel op_params.padding_values.width = (int8_t)_paddingLeft; AvgPoolLayer::AvgPoolLayer() - : _inputData(), _outputData(), _inputShape(), _outputShape(), _paddingLeft(0), _paddingTop(0), + : _inputData(), _outputData(), _inputDescr(), _outputDescr(), _paddingLeft(0), _paddingTop(0), _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0), _kernelWidth(0), _kernelHeight(0), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32) { @@ -55,33 +55,34 @@ void AvgPoolLayer::averagePoolFloat32() op_params.float_activation_min = output_activation_min; op_params.float_activation_max = output_activation_max; - nnfw::cker::AveragePool(op_params, convertShapeToCkerShape(_inputShape), _inputData.f, - convertShapeToCkerShape(_outputShape), _outputData.f); + nnfw::cker::AveragePool(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.f, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.f); } void AvgPoolLayer::averagePoolQuant8() { AVGPOOLING_PARAMETERS int32_t output_activation_min = 0; int32_t output_activation_max = 0; - CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min, + CalculateActivationRangeUint8(_activation, _outputDescr, &output_activation_min, &output_activation_max); op_params.quantized_activation_min = output_activation_min; op_params.quantized_activation_max = output_activation_max; - nnfw::cker::AveragePool(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8, - convertShapeToCkerShape(_outputShape), _outputData.u8); + nnfw::cker::AveragePool(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.u8, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.u8); } -void AvgPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft, - const uint32_t paddingRight, const uint32_t paddingTop, - const uint32_t paddingBottom, const uint32_t strideWidth, - const uint32_t strideHeight, const uint32_t kernelWidth, - const uint32_t kernelHeight, const model::Activation activation, - uint8_t *outputData, const Shape outputShape) +void AvgPoolLayer::configure(uint8_t *inputData, const TensorDescriptor inputDescr, + const uint32_t paddingLeft, const uint32_t paddingRight, + const uint32_t paddingTop, const uint32_t paddingBottom, + const uint32_t strideWidth, const uint32_t strideHeight, + const uint32_t kernelWidth, const uint32_t kernelHeight, + const model::Activation activation, uint8_t *outputData, + const TensorDescriptor outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; - _inputType = inputShape.type; + _inputDescr = inputDescr; + _inputType = inputDescr.type; _paddingLeft = paddingLeft; _paddingRight = paddingRight; _paddingTop = paddingTop; @@ -92,7 +93,7 @@ void AvgPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const u _kernelHeight = kernelHeight; _activation = activation; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void AvgPoolLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h index c18b9f9..e42f403 100644 --- a/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/AvgPoolLayer.h @@ -40,12 +40,12 @@ public: void averagePoolQuant8(); - void configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft, + void configure(uint8_t *inputData, const TensorDescriptor inputDescr, const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom, const uint32_t strideWidth, const uint32_t strideHeight, const uint32_t kernelWidth, const uint32_t kernelHeight, const model::Activation activation, - uint8_t *outputData, const Shape outputShape); + uint8_t *outputData, const TensorDescriptor outputDescr); void run(); void runSync() @@ -59,8 +59,8 @@ private: DataPtr _inputData; DataPtr _outputData; - Shape _inputShape; - Shape _outputShape; + TensorDescriptor _inputDescr; + TensorDescriptor _outputDescr; uint32_t _paddingLeft; uint32_t _paddingTop; diff --git a/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc index c390436..471c9b3 100644 --- a/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.cc @@ -31,7 +31,7 @@ namespace kernel { ConcatLayer::ConcatLayer() - : _inputDataPtrs(), _outputData(), _axis(0), _inputShapes(), _outputShape(), + : _inputDataPtrs(), _outputData(), _axis(0), _inputDescriptors(), _outputDescr(), _inputType(OperandType::FLOAT32) { // DO NOTHING @@ -39,7 +39,7 @@ ConcatLayer::ConcatLayer() void ConcatLayer::concatenationFloat32() { - uint32_t num_inputs = _inputShapes.size(); + uint32_t num_inputs = _inputDescriptors.size(); nnfw::cker::ConcatenationParams op_params; op_params.axis = _axis; @@ -52,7 +52,7 @@ void ConcatLayer::concatenationFloat32() for (uint32_t i = 0; i < num_inputs; i++) { - inputDims.push_back(convertShapeToCkerShape(_inputShapes[i])); + inputDims.push_back(convertTensorDescriptorToCkerShape(_inputDescriptors[i])); inputDimsPtr.push_back(&inputDims[i]); } @@ -64,18 +64,18 @@ void ConcatLayer::concatenationFloat32() } nnfw::cker::Concatenation(op_params, inputDimsPtr.data(), inputFloatPtrs.data(), - convertShapeToCkerShape(_outputShape), _outputData.f); + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.f); } void ConcatLayer::concatenationQuant8() { - uint32_t num_inputs = _inputShapes.size(); + uint32_t num_inputs = _inputDescriptors.size(); std::vector input_zeropoints(num_inputs); std::vector input_scales(num_inputs); for (uint32_t i = 0; i < num_inputs; i++) { - input_zeropoints[i] = _inputShapes[i].offset; - input_scales[i] = _inputShapes[i].scale; + input_zeropoints[i] = _inputDescriptors[i].offset; + input_scales[i] = _inputDescriptors[i].scale; } nnfw::cker::ConcatenationParams op_params; @@ -83,8 +83,8 @@ void ConcatLayer::concatenationQuant8() op_params.inputs_count = num_inputs; op_params.input_zeropoint = input_zeropoints.data(); op_params.input_scale = input_scales.data(); - op_params.output_zeropoint = _outputShape.offset; - op_params.output_scale = _outputShape.scale; + op_params.output_zeropoint = _outputDescr.offset; + op_params.output_scale = _outputDescr.scale; std::vector inputDimsPtr; std::vector inputDims; @@ -92,30 +92,31 @@ void ConcatLayer::concatenationQuant8() inputDims.reserve(num_inputs); for (uint32_t i = 0; i < num_inputs; i++) { - inputDims.push_back(convertShapeToCkerShape(_inputShapes[i])); + inputDims.push_back(convertTensorDescriptorToCkerShape(_inputDescriptors[i])); inputDimsPtr.push_back(&inputDims[i]); } nnfw::cker::Concatenation(op_params, inputDimsPtr.data(), _inputDataPtrs.data(), - convertShapeToCkerShape(_outputShape), _outputData.u8); + convertTensorDescriptorToCkerShape(_outputDescr), + _outputData.u8); } void ConcatLayer::configure(const std::vector &inputDataPtrs, - const std::vector &inputShapes, int32_t axis, - uint8_t *outputData, const Shape outputShape) + const std::vector &inputDescriptors, int32_t axis, + uint8_t *outputData, const TensorDescriptor outputDescr) { _inputDataPtrs = inputDataPtrs; - for (auto shape : inputShapes) + for (auto inputDescr : inputDescriptors) { - _inputShapes.emplace_back(shape); - _inputType = shape.type; + _inputDescriptors.emplace_back(inputDescr); + _inputType = inputDescr.type; } _axis = axis; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void ConcatLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h index 5469179..048aa42 100644 --- a/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/ConcatLayer.h @@ -42,8 +42,8 @@ public: void concatenationQuant8(); void configure(const std::vector &inputDataPtrs, - const std::vector &inputShapes, int32_t axis, uint8_t *outputData, - const Shape outputShape); + const std::vector &inputDescriptors, int32_t axis, + uint8_t *outputData, const TensorDescriptor outputDescr); void run(); void runSync() @@ -59,8 +59,8 @@ private: int32_t _axis; - std::vector _inputShapes; - Shape _outputShape; + std::vector _inputDescriptors; + TensorDescriptor _outputDescr; OperandType _inputType; }; diff --git a/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc index efeabbb..289b26c 100644 --- a/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.cc @@ -29,8 +29,8 @@ namespace cpu namespace kernel { ConvolutionLayer::ConvolutionLayer() - : _inputData(), _kernelData(), _outputData(), _biasData(), _inputShape(), _kernelShape(), - _outputShape(), _biasShape(), _paddingLeft(0), _paddingTop(0), _paddingRight(0), + : _inputData(), _kernelData(), _outputData(), _biasData(), _inputDescr(), _kernelDescr(), + _outputDescr(), _biasDescr(), _paddingLeft(0), _paddingTop(0), _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32) { @@ -52,23 +52,23 @@ void ConvolutionLayer::convFloat32() op_params.float_activation_min = output_activation_min; op_params.float_activation_max = output_activation_max; - nnfw::cker::Conv(op_params, convertShapeToCkerShape(_inputShape), _inputData.f, - convertShapeToCkerShape(_kernelShape), _kernelData.f, - convertShapeToCkerShape(_biasShape), _biasData.f, - convertShapeToCkerShape(_outputShape), _outputData.f); + nnfw::cker::Conv(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.f, + convertTensorDescriptorToCkerShape(_kernelDescr), _kernelData.f, + convertTensorDescriptorToCkerShape(_biasDescr), _biasData.f, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.f); } void ConvolutionLayer::convQuant8() { int32_t output_activation_min = 0; int32_t output_activation_max = 0; - CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min, + CalculateActivationRangeUint8(_activation, _outputDescr, &output_activation_min, &output_activation_max); float real_multiplier = 0.0; int32_t output_multiplier = 0; int32_t output_shift = 0; - GetQuantizedConvolutionMultiplier(_inputShape, _kernelShape, _biasShape, _outputShape, + GetQuantizedConvolutionMultiplier(_inputDescr, _kernelDescr, _biasDescr, _outputDescr, &real_multiplier); QuantizeMultiplier(real_multiplier, &output_multiplier, &output_shift); @@ -79,35 +79,36 @@ void ConvolutionLayer::convQuant8() op_params.dilation_height_factor = 1; op_params.padding_values.width = _paddingLeft; op_params.padding_values.height = _paddingTop; - op_params.input_offset = -_inputShape.offset; - op_params.weights_offset = -_kernelShape.offset; - op_params.output_offset = _outputShape.offset; + op_params.input_offset = -_inputDescr.offset; + op_params.weights_offset = -_kernelDescr.offset; + op_params.output_offset = _outputDescr.offset; op_params.output_multiplier = output_multiplier; op_params.output_shift = output_shift; op_params.quantized_activation_min = output_activation_min; op_params.quantized_activation_max = output_activation_max; - nnfw::cker::Conv(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8, - convertShapeToCkerShape(_kernelShape), _kernelData.u8, - convertShapeToCkerShape(_biasShape), _biasData.i32, - convertShapeToCkerShape(_outputShape), _outputData.u8); + nnfw::cker::Conv(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.u8, + convertTensorDescriptorToCkerShape(_kernelDescr), _kernelData.u8, + convertTensorDescriptorToCkerShape(_biasDescr), _biasData.i32, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.u8); } -void ConvolutionLayer::configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData, - const Shape kernelShape, uint8_t *biasData, const Shape biasShape, +void ConvolutionLayer::configure(uint8_t *inputData, const TensorDescriptor inputDescr, + uint8_t *kernelData, const TensorDescriptor kernelDescr, + uint8_t *biasData, const TensorDescriptor biasDescr, const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom, const uint32_t strideWidth, const uint32_t strideHeight, const model::Activation activation, uint8_t *outputData, - const Shape outputShape) + const TensorDescriptor outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; - _inputType = inputShape.type; + _inputDescr = inputDescr; + _inputType = inputDescr.type; _kernelData.u8 = kernelData; - _kernelShape = kernelShape; + _kernelDescr = kernelDescr; _biasData.u8 = biasData; - _biasShape = biasShape; + _biasDescr = biasDescr; _paddingLeft = paddingLeft; _paddingRight = paddingRight; _paddingTop = paddingTop; @@ -116,7 +117,7 @@ void ConvolutionLayer::configure(uint8_t *inputData, const Shape inputShape, uin _strideHeight = strideHeight; _activation = activation; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void ConvolutionLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h index 868d08a..1efb1dc 100644 --- a/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/ConvolutionLayer.h @@ -40,11 +40,13 @@ public: void convQuant8(); - void configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData, - const Shape kernelShape, uint8_t *biasData, const Shape biasShape, - const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop, + void configure(uint8_t *inputData, const TensorDescriptor inputDescr, uint8_t *kernelData, + const TensorDescriptor kernelDescr, uint8_t *biasData, + const TensorDescriptor biasDescr, const uint32_t paddingLeft, + const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom, const uint32_t strideW, const uint32_t strideH, - const model::Activation activation, uint8_t *outputData, const Shape outputShape); + const model::Activation activation, uint8_t *outputData, + const TensorDescriptor outputDescr); void run(); void runSync() @@ -60,10 +62,10 @@ private: DataPtr _outputData; DataPtr _biasData; - Shape _inputShape; - Shape _kernelShape; - Shape _outputShape; - Shape _biasShape; + TensorDescriptor _inputDescr; + TensorDescriptor _kernelDescr; + TensorDescriptor _outputDescr; + TensorDescriptor _biasDescr; uint32_t _paddingLeft; uint32_t _paddingTop; diff --git a/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc index 1c750e0..2ba5c42 100644 --- a/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.cc @@ -28,8 +28,8 @@ namespace kernel { DepthwiseConvolutionLayer::DepthwiseConvolutionLayer() - : _inputData(), _kernelData(), _outputData(), _biasData(), _inputShape(), _kernelShape(), - _outputShape(), _biasShape(), _paddingLeft(0), _paddingTop(0), _paddingRight(0), + : _inputData(), _kernelData(), _outputData(), _biasData(), _inputDescr(), _kernelDescr(), + _outputDescr(), _biasDescr(), _paddingLeft(0), _paddingTop(0), _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0), _multiplier(0), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32) { @@ -52,23 +52,24 @@ void DepthwiseConvolutionLayer::convFloat32() op_params.float_activation_min = output_activation_min; op_params.float_activation_max = output_activation_max; - nnfw::cker::DepthwiseConv(op_params, convertShapeToCkerShape(_inputShape), _inputData.f, - convertShapeToCkerShape(_kernelShape), _kernelData.f, - convertShapeToCkerShape(_biasShape), _biasData.f, - convertShapeToCkerShape(_outputShape), _outputData.f); + nnfw::cker::DepthwiseConv(op_params, convertTensorDescriptorToCkerShape(_inputDescr), + _inputData.f, convertTensorDescriptorToCkerShape(_kernelDescr), + _kernelData.f, convertTensorDescriptorToCkerShape(_biasDescr), + _biasData.f, convertTensorDescriptorToCkerShape(_outputDescr), + _outputData.f); } void DepthwiseConvolutionLayer::convQuant8() { int32_t output_activation_min = 0; int32_t output_activation_max = 0; - CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min, + CalculateActivationRangeUint8(_activation, _outputDescr, &output_activation_min, &output_activation_max); float real_multiplier = 0.0; int32_t output_multiplier = 0; int32_t output_shift = 0; - GetQuantizedConvolutionMultiplier(_inputShape, _kernelShape, _biasShape, _outputShape, + GetQuantizedConvolutionMultiplier(_inputDescr, _kernelDescr, _biasDescr, _outputDescr, &real_multiplier); QuantizeMultiplier(real_multiplier, &output_multiplier, &output_shift); @@ -80,34 +81,38 @@ void DepthwiseConvolutionLayer::convQuant8() op_params.padding_values.width = _paddingLeft; op_params.padding_values.height = _paddingTop; op_params.depth_multiplier = _multiplier; - op_params.input_offset = -_inputShape.offset; - op_params.weights_offset = -_kernelShape.offset; - op_params.output_offset = _outputShape.offset; + op_params.input_offset = -_inputDescr.offset; + op_params.weights_offset = -_kernelDescr.offset; + op_params.output_offset = _outputDescr.offset; op_params.output_multiplier = output_multiplier; op_params.output_shift = output_shift; op_params.quantized_activation_min = output_activation_min; op_params.quantized_activation_max = output_activation_max; - nnfw::cker::DepthwiseConv(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8, - convertShapeToCkerShape(_kernelShape), _kernelData.u8, - convertShapeToCkerShape(_biasShape), _biasData.i32, - convertShapeToCkerShape(_outputShape), _outputData.u8); + nnfw::cker::DepthwiseConv(op_params, convertTensorDescriptorToCkerShape(_inputDescr), + _inputData.u8, convertTensorDescriptorToCkerShape(_kernelDescr), + _kernelData.u8, convertTensorDescriptorToCkerShape(_biasDescr), + _biasData.i32, convertTensorDescriptorToCkerShape(_outputDescr), + _outputData.u8); } -void DepthwiseConvolutionLayer::configure( - uint8_t *inputData, const Shape inputShape, uint8_t *kernelData, const Shape kernelShape, - uint8_t *biasData, const Shape biasShape, const uint32_t paddingLeft, - const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom, - const uint32_t strideWidth, const uint32_t strideHeight, const uint32_t multiplier, - const model::Activation activation, uint8_t *outputData, const Shape outputShape) +void DepthwiseConvolutionLayer::configure(uint8_t *inputData, const TensorDescriptor inputDescr, + uint8_t *kernelData, const TensorDescriptor kernelDescr, + uint8_t *biasData, const TensorDescriptor biasDescr, + const uint32_t paddingLeft, const uint32_t paddingRight, + const uint32_t paddingTop, const uint32_t paddingBottom, + const uint32_t strideWidth, const uint32_t strideHeight, + const uint32_t multiplier, + const model::Activation activation, uint8_t *outputData, + const TensorDescriptor outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; - _inputType = inputShape.type; + _inputDescr = inputDescr; + _inputType = inputDescr.type; _kernelData.u8 = kernelData; - _kernelShape = kernelShape; + _kernelDescr = kernelDescr; _biasData.u8 = biasData; - _biasShape = biasShape; + _biasDescr = biasDescr; _paddingLeft = paddingLeft; _paddingRight = paddingRight; _paddingTop = paddingTop; @@ -117,7 +122,7 @@ void DepthwiseConvolutionLayer::configure( _multiplier = multiplier; _activation = activation; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void DepthwiseConvolutionLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h index b031bc8..85230e1 100644 --- a/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/DepthwiseConvolutionLayer.h @@ -40,12 +40,13 @@ public: void convQuant8(); - void configure(uint8_t *inputData, const Shape inputShape, uint8_t *kernelData, - const Shape kernelShape, uint8_t *biasData, const Shape biasShape, - const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop, + void configure(uint8_t *inputData, const TensorDescriptor inputDescr, uint8_t *kernelData, + const TensorDescriptor kernelDescr, uint8_t *biasData, + const TensorDescriptor biasDescr, const uint32_t paddingLeft, + const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom, const uint32_t strideW, const uint32_t strideH, const uint32_t multiplier, const model::Activation activation, uint8_t *outputData, - const Shape outputShape); + const TensorDescriptor outputDescr); void run(); void runSync() @@ -61,10 +62,10 @@ private: DataPtr _outputData; DataPtr _biasData; - Shape _inputShape; - Shape _kernelShape; - Shape _outputShape; - Shape _biasShape; + TensorDescriptor _inputDescr; + TensorDescriptor _kernelDescr; + TensorDescriptor _outputDescr; + TensorDescriptor _biasDescr; uint32_t _paddingLeft; uint32_t _paddingTop; diff --git a/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc index cbd3692..b9361b2 100644 --- a/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.cc @@ -31,8 +31,8 @@ namespace kernel { FullyConnectedLayer::FullyConnectedLayer() - : _inputData(), _weightsData(), _biasData(), _outputData(), _inputShape(), _weightsShape(), - _biasShape(), _outputShape(), _activation(model::Activation::NONE), + : _inputData(), _weightsData(), _biasData(), _outputData(), _inputDescr(), _weightsDescr(), + _biasDescr(), _outputDescr(), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32) { // DO NOTHING @@ -47,10 +47,10 @@ void FullyConnectedLayer::fullyConnectedFloat32() op_params.float_activation_min = output_activation_min; op_params.float_activation_max = output_activation_max; - nnfw::cker::FullyConnected(op_params, convertToExtendedCkerShape(_inputShape), _inputData.f, - convertToExtendedCkerShape(_weightsShape), _weightsData.f, - convertToExtendedCkerShape(_biasShape), _biasData.f, - convertToExtendedCkerShape(_outputShape), _outputData.f); + nnfw::cker::FullyConnected(op_params, convertToExtendedCkerShape(_inputDescr), _inputData.f, + convertToExtendedCkerShape(_weightsDescr), _weightsData.f, + convertToExtendedCkerShape(_biasDescr), _biasData.f, + convertToExtendedCkerShape(_outputDescr), _outputData.f); } // executionMutex is used to protect concurrent access of non-threadsafe resources @@ -62,43 +62,43 @@ void FullyConnectedLayer::fullyConnectedQuant8() int32_t output_shift = 0; int32_t output_activation_min = 0; int32_t output_activation_max = 0; - GetQuantizedConvolutionMultiplier(_inputShape, _weightsShape, _biasShape, _outputShape, + GetQuantizedConvolutionMultiplier(_inputDescr, _weightsDescr, _biasDescr, _outputDescr, &real_multiplier); QuantizeMultiplier(real_multiplier, &output_multiplier, &output_shift); - CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min, + CalculateActivationRangeUint8(_activation, _outputDescr, &output_activation_min, &output_activation_max); nnfw::cker::FullyConnectedParams op_params; - op_params.input_offset = -_inputShape.offset; - op_params.weights_offset = -_weightsShape.offset; - op_params.output_offset = _outputShape.offset; + op_params.input_offset = -_inputDescr.offset; + op_params.weights_offset = -_weightsDescr.offset; + op_params.output_offset = _outputDescr.offset; op_params.output_multiplier = output_multiplier; op_params.output_shift = output_shift; op_params.quantized_activation_min = output_activation_min; op_params.quantized_activation_max = output_activation_max; - nnfw::cker::FullyConnected(op_params, convertToExtendedCkerShape(_inputShape), _inputData.u8, - convertToExtendedCkerShape(_weightsShape), _weightsData.u8, - convertToExtendedCkerShape(_biasShape), _biasData.i32, - convertToExtendedCkerShape(_outputShape), _outputData.u8); + nnfw::cker::FullyConnected(op_params, convertToExtendedCkerShape(_inputDescr), _inputData.u8, + convertToExtendedCkerShape(_weightsDescr), _weightsData.u8, + convertToExtendedCkerShape(_biasDescr), _biasData.i32, + convertToExtendedCkerShape(_outputDescr), _outputData.u8); } -void FullyConnectedLayer::configure(uint8_t *inputData, const Shape inputShape, - uint8_t *weightsData, const Shape weightsShape, - uint8_t *biasData, const Shape biasShape, +void FullyConnectedLayer::configure(uint8_t *inputData, const TensorDescriptor inputDescr, + uint8_t *weightsData, const TensorDescriptor weightsDescr, + uint8_t *biasData, const TensorDescriptor biasDescr, model::Activation activation, uint8_t *outputData, - const Shape outputShape) + const TensorDescriptor outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; - _inputType = inputShape.type; + _inputDescr = inputDescr; + _inputType = inputDescr.type; _weightsData.u8 = weightsData; - _weightsShape = weightsShape; + _weightsDescr = weightsDescr; _biasData.u8 = biasData; - _biasShape = biasShape; + _biasDescr = biasDescr; _activation = activation; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void FullyConnectedLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h index 635239f..83e493a 100644 --- a/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/FullyConnectedLayer.h @@ -40,9 +40,10 @@ public: void fullyConnectedQuant8(); - void configure(uint8_t *inputData, const Shape inputShape, uint8_t *weightsData, - const Shape weightsShape, uint8_t *biasData, const Shape biasShape, - model::Activation activation, uint8_t *outputData, const Shape outputShape); + void configure(uint8_t *inputData, const TensorDescriptor inputDescr, uint8_t *weightsData, + const TensorDescriptor weightsDescr, uint8_t *biasData, + const TensorDescriptor biasDescr, model::Activation activation, + uint8_t *outputData, const TensorDescriptor outputDescr); void run(); void runSync() @@ -58,10 +59,10 @@ private: DataPtr _biasData; DataPtr _outputData; - Shape _inputShape; - Shape _weightsShape; - Shape _biasShape; - Shape _outputShape; + TensorDescriptor _inputDescr; + TensorDescriptor _weightsDescr; + TensorDescriptor _biasDescr; + TensorDescriptor _outputDescr; model::Activation _activation; diff --git a/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc index 0aaaf92..a7814e6 100644 --- a/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.cc @@ -39,7 +39,7 @@ namespace kernel op_params.padding_values.width = (int8_t)_paddingLeft; MaxPoolLayer::MaxPoolLayer() - : _inputData(), _outputData(), _inputShape(), _outputShape(), _paddingLeft(0), _paddingTop(0), + : _inputData(), _outputData(), _inputDescr(), _outputDescr(), _paddingLeft(0), _paddingTop(0), _paddingRight(0), _paddingBottom(0), _strideWidth(0), _strideHeight(0), _kernelWidth(0), _kernelHeight(0), _activation(model::Activation::NONE), _inputType(OperandType::FLOAT32) { @@ -54,34 +54,35 @@ void MaxPoolLayer::maxPoolFloat32() op_params.float_activation_min = output_activation_min; op_params.float_activation_max = output_activation_max; - nnfw::cker::MaxPool(op_params, convertShapeToCkerShape(_inputShape), _inputData.f, - convertShapeToCkerShape(_outputShape), _outputData.f); + nnfw::cker::MaxPool(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.f, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.f); } void MaxPoolLayer::maxPoolQuant8() { MAXPOOLING_PARAMETERS int32_t output_activation_min = 0; int32_t output_activation_max = 0; - CalculateActivationRangeUint8(_activation, _outputShape, &output_activation_min, + CalculateActivationRangeUint8(_activation, _outputDescr, &output_activation_min, &output_activation_max); op_params.quantized_activation_min = output_activation_min; op_params.quantized_activation_max = output_activation_max; - nnfw::cker::MaxPool(op_params, convertShapeToCkerShape(_inputShape), _inputData.u8, - convertShapeToCkerShape(_outputShape), _outputData.u8); + nnfw::cker::MaxPool(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.u8, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.u8); } -void MaxPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft, - const uint32_t paddingRight, const uint32_t paddingTop, - const uint32_t paddingBottom, const uint32_t strideWidth, - const uint32_t strideHeight, const uint32_t kernelWidth, - const uint32_t kernelHeight, const model::Activation activation, - uint8_t *outputData, const Shape outputShape) +void MaxPoolLayer::configure(uint8_t *inputData, const TensorDescriptor inputDescr, + const uint32_t paddingLeft, const uint32_t paddingRight, + const uint32_t paddingTop, const uint32_t paddingBottom, + const uint32_t strideWidth, const uint32_t strideHeight, + const uint32_t kernelWidth, const uint32_t kernelHeight, + const model::Activation activation, uint8_t *outputData, + const TensorDescriptor outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; - _inputType = inputShape.type; + _inputDescr = inputDescr; + _inputType = inputDescr.type; _paddingLeft = paddingLeft; _paddingRight = paddingRight; _paddingTop = paddingTop; @@ -92,7 +93,7 @@ void MaxPoolLayer::configure(uint8_t *inputData, const Shape inputShape, const u _kernelHeight = kernelHeight; _activation = activation; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void MaxPoolLayer::run() diff --git a/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h index 2f4d2fb..bfd3481 100644 --- a/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/MaxPoolLayer.h @@ -40,12 +40,12 @@ public: void maxPoolQuant8(); - void configure(uint8_t *inputData, const Shape inputShape, const uint32_t paddingLeft, + void configure(uint8_t *inputData, const TensorDescriptor inputDescr, const uint32_t paddingLeft, const uint32_t paddingRight, const uint32_t paddingTop, const uint32_t paddingBottom, const uint32_t strideWidth, const uint32_t strideHeight, const uint32_t kernelWidth, const uint32_t kernelHeight, const model::Activation activation, - uint8_t *outputData, const Shape outputShape); + uint8_t *outputData, const TensorDescriptor outputDescr); void run(); void runSync() @@ -59,8 +59,8 @@ private: DataPtr _inputData; DataPtr _outputData; - Shape _inputShape; - Shape _outputShape; + TensorDescriptor _inputDescr; + TensorDescriptor _outputDescr; uint32_t _paddingLeft; uint32_t _paddingTop; diff --git a/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc b/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc index 40b7ef3..8397dee 100644 --- a/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc +++ b/runtimes/neurun/backend/cpu/kernel/OperationUtils.cc @@ -29,26 +29,26 @@ namespace cpu namespace kernel { -uint32_t getNumberOfDimensions(const Shape &shape) { return shape.dimensions.size(); } +uint32_t getNumberOfDimensions(const TensorDescriptor &descr) { return descr.dimensions.size(); } -uint32_t getNumberOfElements(const Shape &shape) +uint32_t getNumberOfElements(const TensorDescriptor &descr) { uint32_t count = 1; - for (size_t i = 0; i < shape.dimensions.size(); i++) + for (size_t i = 0; i < descr.dimensions.size(); i++) { - count *= shape.dimensions[i]; + count *= descr.dimensions[i]; } return count; } -uint32_t getSizeOfDimension(const Shape &shape, uint32_t dimensionIdx) +uint32_t getSizeOfDimension(const TensorDescriptor &descr, uint32_t dimensionIdx) { - if (dimensionIdx >= shape.dimensions.size()) + if (dimensionIdx >= descr.dimensions.size()) { // TODO, log the error return 0; } - return shape.dimensions[dimensionIdx]; + return descr.dimensions[dimensionIdx]; } void QuantizeMultiplier(double double_multiplier, int32_t *quantized_multiplier, int *shift) @@ -72,13 +72,14 @@ void QuantizeMultiplier(double double_multiplier, int32_t *quantized_multiplier, *quantized_multiplier = static_cast(q_fixed); } -void GetQuantizedConvolutionMultiplier(const Shape &inputShape, const Shape &filterShape, - const Shape &biasShape, const Shape &outputShape, - float *multiplier) +void GetQuantizedConvolutionMultiplier(const TensorDescriptor &inputDescr, + const TensorDescriptor &filterDescr, + const TensorDescriptor &biasDescr, + const TensorDescriptor &outputDescr, float *multiplier) { - const float input_product_scale = inputShape.scale * filterShape.scale; - const float bias_scale = biasShape.scale; - const float output_scale = outputShape.scale; + const float input_product_scale = inputDescr.scale * filterDescr.scale; + const float bias_scale = biasDescr.scale; + const float output_scale = outputDescr.scale; // The following conditions must be guaranteed by the training pipeline. UNUSED_RELEASE(bias_scale); assert(std::abs(input_product_scale - bias_scale) <= @@ -134,13 +135,14 @@ void CalculateActivationRangeFloat(model::Activation activation, float *activati } } -void CalculateActivationRangeUint8(model::Activation activation, const Shape &outputShape, - int32_t *act_min, int32_t *act_max) +void CalculateActivationRangeUint8(model::Activation activation, + const TensorDescriptor &outputDescr, int32_t *act_min, + int32_t *act_max) { const int32_t qmin = std::numeric_limits::min(); const int32_t qmax = std::numeric_limits::max(); - const auto scale = outputShape.scale; - const auto zero_point = outputShape.offset; + const auto scale = outputDescr.scale; + const auto zero_point = outputDescr.offset; auto quantize = [scale, zero_point](float f) { return zero_point + static_cast(std::round(f / scale)); }; @@ -180,9 +182,10 @@ int32_t CalculateInputRadius(int input_integer_bits, int input_left_shift) return static_cast(std::floor(max_input_rescaled)); } -Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout frontend_layout) +TensorDescriptor getTensorDescriptor(const ::neurun::model::Operand &o, + ::neurun::model::Layout frontend_layout) { - Shape shape; + TensorDescriptor descriptor; auto dims = o.shape().dims(); if (frontend_layout == ::neurun::model::Layout::NCHW && o.shape().rank() == 4) @@ -194,15 +197,15 @@ Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout fronte dims.at(i) = o.shape().dim(permutation[i]); } } - shape.dimensions = std::vector(dims.begin(), dims.end()); - shape.type = static_cast(static_cast(o.typeInfo().type())); - shape.scale = o.typeInfo().scale(); - shape.offset = o.typeInfo().offset(); + descriptor.dimensions = std::vector(dims.begin(), dims.end()); + descriptor.type = static_cast(static_cast(o.typeInfo().type())); + descriptor.scale = o.typeInfo().scale(); + descriptor.offset = o.typeInfo().offset(); // CPU backend assume that neurun internal shape's rank is always same or less than 4 - assert(shape.dimensions.size() <= 4); + assert(descriptor.dimensions.size() <= 4); - return shape; + return descriptor; } uint32_t sizeOfData(OperandType type, const std::vector &dimensions) diff --git a/runtimes/neurun/backend/cpu/kernel/OperationUtils.h b/runtimes/neurun/backend/cpu/kernel/OperationUtils.h index dc5bab9..e6bb208 100644 --- a/runtimes/neurun/backend/cpu/kernel/OperationUtils.h +++ b/runtimes/neurun/backend/cpu/kernel/OperationUtils.h @@ -38,7 +38,7 @@ namespace cpu namespace kernel { -struct Shape +struct TensorDescriptor { OperandType type; std::vector dimensions; @@ -54,18 +54,18 @@ union DataPtr { void *v; }; -uint32_t getNumberOfDimensions(const Shape &shape); +uint32_t getNumberOfDimensions(const TensorDescriptor &descr); -uint32_t getNumberOfElements(const Shape &shape); +uint32_t getNumberOfElements(const TensorDescriptor &descr); -uint32_t getSizeOfDimension(const Shape &shape, uint32_t dimensionIdx); +uint32_t getSizeOfDimension(const TensorDescriptor &descr, uint32_t dimensionIdx); -inline nnfw::cker::Shape convertToExtendedCkerShape(const Shape &shape) +inline nnfw::cker::Shape convertToExtendedCkerShape(const TensorDescriptor &descr) { std::vector raw_shape; raw_shape.resize(4); - uint32_t src = 4 - shape.dimensions.size(); + uint32_t src = 4 - descr.dimensions.size(); for (uint32_t i = 0; i < 4; ++i) { if (i < src) @@ -74,27 +74,27 @@ inline nnfw::cker::Shape convertToExtendedCkerShape(const Shape &shape) } else { - raw_shape[i] = shape.dimensions[i - src]; + raw_shape[i] = descr.dimensions[i - src]; } } return nnfw::cker::GetShape(raw_shape); } -inline nnfw::cker::Shape convertShapeToCkerShape(const Shape &shape) +inline nnfw::cker::Shape convertTensorDescriptorToCkerShape(const TensorDescriptor &descr) { std::vector raw_shape; raw_shape.resize(4); for (uint32_t i = 0; i < 4; ++i) { - if (i >= shape.dimensions.size()) + if (i >= descr.dimensions.size()) { raw_shape[i] = 1; } else { - raw_shape[i] = shape.dimensions[i]; + raw_shape[i] = descr.dimensions[i]; } } @@ -122,9 +122,10 @@ inline int32_t getAxis(uint32_t rank, int32_t axis, ::neurun::model::Layout fron void QuantizeMultiplier(double double_multiplier, int32_t *quantized_multiplier, int *shift); -void GetQuantizedConvolutionMultiplier(const Shape &inputShape, const Shape &filterShape, - const Shape &biasShape, const Shape &outputShape, - float *multiplier); +void GetQuantizedConvolutionMultiplier(const TensorDescriptor &inputDescr, + const TensorDescriptor &filterDescr, + const TensorDescriptor &biasDescr, + const TensorDescriptor &outputDescr, float *multiplier); void QuantizeMultiplierGreaterThanOne(double double_multiplier, int32_t *quantized_multiplier, int *left_shift); @@ -132,12 +133,14 @@ void QuantizeMultiplierGreaterThanOne(double double_multiplier, int32_t *quantiz void CalculateActivationRangeFloat(model::Activation activation, float *activation_min, float *activation_max); -void CalculateActivationRangeUint8(model::Activation activation, const Shape &outputShape, - int32_t *act_min, int32_t *act_max); +void CalculateActivationRangeUint8(model::Activation activation, + const TensorDescriptor &outputDescr, int32_t *act_min, + int32_t *act_max); int32_t CalculateInputRadius(int input_integer_bits, int input_left_shift); -Shape getShape(const ::neurun::model::Operand &o, ::neurun::model::Layout frontend_layout); +TensorDescriptor getTensorDescriptor(const ::neurun::model::Operand &o, + ::neurun::model::Layout frontend_layout); uint32_t sizeOfData(OperandType type, const std::vector &dimensions); diff --git a/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc index 3cf3ae3..caeee9f 100644 --- a/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.cc @@ -26,24 +26,24 @@ namespace cpu namespace kernel { -ReshapeLayer::ReshapeLayer() : _inputData(), _outputData(), _inputShape(), _outputShape() +ReshapeLayer::ReshapeLayer() : _inputData(), _outputData(), _inputDescr(), _outputDescr() { // DO NOTHING } void ReshapeLayer::reshapeGeneric() { - size_t count = sizeOfData(_inputShape.type, _inputShape.dimensions); + size_t count = sizeOfData(_inputDescr.type, _inputDescr.dimensions); memcpy(_outputData.v, _inputData.v, count); } -void ReshapeLayer::configure(uint8_t *inputData, const Shape &inputShape, uint8_t *outputData, - const Shape &outputShape) +void ReshapeLayer::configure(uint8_t *inputData, const TensorDescriptor &inputDescr, + uint8_t *outputData, const TensorDescriptor &outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; + _inputDescr = inputDescr; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; } void ReshapeLayer::run() { reshapeGeneric(); } diff --git a/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h index dccd82c..25dd851 100644 --- a/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/ReshapeLayer.h @@ -38,8 +38,8 @@ public: public: void reshapeGeneric(); - void configure(uint8_t *inputData, const Shape &inputShape, uint8_t *outputData, - const Shape &outputShape); + void configure(uint8_t *inputData, const TensorDescriptor &inputDescr, uint8_t *outputData, + const TensorDescriptor &outputDescr); void run(); void runSync() @@ -53,8 +53,8 @@ private: DataPtr _inputData; DataPtr _outputData; - Shape _inputShape; - Shape _outputShape; + TensorDescriptor _inputDescr; + TensorDescriptor _outputDescr; }; } // namespace kernel diff --git a/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc index f71a779..58ba109 100644 --- a/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc +++ b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.cc @@ -30,7 +30,7 @@ namespace kernel { SoftMaxLayer::SoftMaxLayer() - : _inputData(), _outputData(), _beta(0.0), _inputShape(), _outputShape(), + : _inputData(), _outputData(), _beta(0.0), _inputDescr(), _outputDescr(), _inputType(OperandType::FLOAT32) { // DO NOTHING @@ -76,23 +76,23 @@ void Softmax(const float *in, const int input_size, const int batch_size, const void SoftMaxLayer::softmaxFloat32() { - Shape shapeIn4D; + TensorDescriptor descrIn4D; - if (getNumberOfDimensions(_inputShape) == 2) + if (getNumberOfDimensions(_inputDescr) == 2) { - uint32_t batch_size = getSizeOfDimension(_inputShape, 0); + uint32_t batch_size = getSizeOfDimension(_inputDescr, 0); if (batch_size == 0) throw std::runtime_error("batch_size should not be 0"); - uint32_t input_size = getNumberOfElements(_inputShape) / batch_size; + uint32_t input_size = getNumberOfElements(_inputDescr) / batch_size; Softmax(_inputData.f, input_size, batch_size, _beta, _outputData.f); } - else if (getNumberOfDimensions(_inputShape) == 4) + else if (getNumberOfDimensions(_inputDescr) == 4) { nnfw::cker::SoftmaxParams op_params; op_params.beta = _beta; - nnfw::cker::Softmax(op_params, convertShapeToCkerShape(_inputShape), _inputData.f, - convertShapeToCkerShape(_outputShape), _outputData.f); + nnfw::cker::Softmax(op_params, convertTensorDescriptorToCkerShape(_inputDescr), _inputData.f, + convertTensorDescriptorToCkerShape(_outputDescr), _outputData.f); } else { @@ -102,32 +102,32 @@ void SoftMaxLayer::softmaxFloat32() void SoftMaxLayer::softmaxQuant8() { - Shape shapeIn4D = _inputShape; + TensorDescriptor descrIn4D = _inputDescr; - if (getNumberOfDimensions(_inputShape) == 2) + if (getNumberOfDimensions(_inputDescr) == 2) { - uint32_t batch_size = getSizeOfDimension(_inputShape, 0); + uint32_t batch_size = getSizeOfDimension(_inputDescr, 0); if (batch_size == 0) throw std::runtime_error("batch_size should not be 0"); - uint32_t input_size = getNumberOfElements(_inputShape) / batch_size; - shapeIn4D.dimensions = {batch_size, 1, 1, input_size}; + uint32_t input_size = getNumberOfElements(_inputDescr) / batch_size; + descrIn4D.dimensions = {batch_size, 1, 1, input_size}; } - else if (getNumberOfDimensions(_inputShape) == 4) + else if (getNumberOfDimensions(_inputDescr) == 4) { - shapeIn4D = _inputShape; + descrIn4D = _inputDescr; } else { throw std::runtime_error{"only 2D and 4D tensors supported"}; } - if (_outputShape.offset != 0 || _outputShape.scale != 1.f / 256) + if (_outputDescr.offset != 0 || _outputDescr.scale != 1.f / 256) { throw std::runtime_error{"incorrect scale / offset for output"}; } static const int32_t kScaledDiffIntegerBits = 5; const double input_beta_real_multiplier = std::min( - 1.0 * _beta * _inputShape.scale * (1 << (31 - kScaledDiffIntegerBits)), (1ll << 31) - 1.0); + 1.0 * _beta * _inputDescr.scale * (1 << (31 - kScaledDiffIntegerBits)), (1ll << 31) - 1.0); int32_t input_multiplier = 0; int32_t input_left_shift = 0; QuantizeMultiplierGreaterThanOne(input_beta_real_multiplier, &input_multiplier, @@ -138,18 +138,19 @@ void SoftMaxLayer::softmaxQuant8() op_params.input_multiplier = input_multiplier; op_params.input_left_shift = input_left_shift; op_params.diff_min = diff_min; - nnfw::cker::Softmax(op_params, convertShapeToCkerShape(shapeIn4D), _inputData.u8, - convertShapeToCkerShape(shapeIn4D), _outputData.u8); + nnfw::cker::Softmax(op_params, convertTensorDescriptorToCkerShape(descrIn4D), _inputData.u8, + convertTensorDescriptorToCkerShape(descrIn4D), _outputData.u8); } -void SoftMaxLayer::configure(uint8_t *inputData, const Shape &inputShape, const float beta, - uint8_t *outputData, const Shape &outputShape) +void SoftMaxLayer::configure(uint8_t *inputData, const TensorDescriptor &inputDescr, + const float beta, uint8_t *outputData, + const TensorDescriptor &outputDescr) { _inputData.u8 = inputData; - _inputShape = inputShape; - _inputType = inputShape.type; + _inputDescr = inputDescr; + _inputType = inputDescr.type; _outputData.u8 = outputData; - _outputShape = outputShape; + _outputDescr = outputDescr; _beta = beta; } diff --git a/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h index 097b3dd..4723afb 100644 --- a/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h +++ b/runtimes/neurun/backend/cpu/kernel/SoftMaxLayer.h @@ -40,8 +40,8 @@ public: void softmaxQuant8(); - void configure(uint8_t *inputData, const Shape &inputShape, const float beta, uint8_t *outputData, - const Shape &outputShape); + void configure(uint8_t *inputData, const TensorDescriptor &inputDescr, const float beta, + uint8_t *outputData, const TensorDescriptor &outputDescr); void run(); void runSync() @@ -57,8 +57,8 @@ private: float _beta; - Shape _inputShape; - Shape _outputShape; + TensorDescriptor _inputDescr; + TensorDescriptor _outputDescr; OperandType _inputType; }; -- 2.7.4