From 8de275435b00511c9840e3d64fa294481f63b5dc Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Wed, 25 Jan 2023 17:08:42 -0800 Subject: [PATCH] [RISCV] Rename CS_ALU tablegen class to CA_ALU. NFC The format this uses is CA. I think it may have once shared CS and this didn't get renamed when that changed in D54302. --- llvm/lib/Target/RISCV/RISCVInstrInfoC.td | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td index 26a16d0..32e89f8 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td @@ -284,7 +284,7 @@ class Shift_right funct2, string OpcodeStr, RegisterClass cls, } let hasSideEffects = 0, mayLoad = 0, mayStore = 0 in -class CS_ALU funct6, bits<2> funct2, string OpcodeStr, +class CA_ALU funct6, bits<2> funct2, string OpcodeStr, RegisterClass cls> : RVInst16CA { @@ -465,19 +465,19 @@ def C_ANDI : RVInst16CB<0b100, 0b01, (outs GPRC:$rs1_wb), (ins GPRC:$rs1, simm6: let Inst{6-2} = imm{4-0}; } -def C_SUB : CS_ALU<0b100011, 0b00, "c.sub", GPRC>, +def C_SUB : CA_ALU<0b100011, 0b00, "c.sub", GPRC>, Sched<[WriteIALU, ReadIALU, ReadIALU]>; -def C_XOR : CS_ALU<0b100011, 0b01, "c.xor", GPRC>, +def C_XOR : CA_ALU<0b100011, 0b01, "c.xor", GPRC>, Sched<[WriteIALU, ReadIALU, ReadIALU]>; -def C_OR : CS_ALU<0b100011, 0b10, "c.or" , GPRC>, +def C_OR : CA_ALU<0b100011, 0b10, "c.or" , GPRC>, Sched<[WriteIALU, ReadIALU, ReadIALU]>; -def C_AND : CS_ALU<0b100011, 0b11, "c.and", GPRC>, +def C_AND : CA_ALU<0b100011, 0b11, "c.and", GPRC>, Sched<[WriteIALU, ReadIALU, ReadIALU]>; let Predicates = [HasStdExtCOrZca, IsRV64] in { -def C_SUBW : CS_ALU<0b100111, 0b00, "c.subw", GPRC>, +def C_SUBW : CA_ALU<0b100111, 0b00, "c.subw", GPRC>, Sched<[WriteIALU32, ReadIALU32, ReadIALU32]>; -def C_ADDW : CS_ALU<0b100111, 0b01, "c.addw", GPRC>, +def C_ADDW : CA_ALU<0b100111, 0b01, "c.addw", GPRC>, Sched<[WriteIALU32, ReadIALU32, ReadIALU32]>; } -- 2.7.4