From 8ceb8568d6e8d53dc000a9eeacd47c8f298c38f0 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Yannick=20Fertr=C3=A9?= Date: Mon, 1 Apr 2019 09:24:17 +0200 Subject: [PATCH] drm/stm: ltdc: update planes at next vblank to avoid partial refresh MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Plane updates must be synchronized on vblank with the shadow register mechanism to avoid partial refresh on screen. Signed-off-by: Yannick Fertré Acked-by: Philippe Cornu Signed-off-by: Benjamin Gaignard Link: https://patchwork.freedesktop.org/patch/msgid/1554103457-29595-1-git-send-email-yannick.fertre@st.com --- drivers/gpu/drm/stm/ltdc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/stm/ltdc.c b/drivers/gpu/drm/stm/ltdc.c index 02f67fa..cde2f18 100644 --- a/drivers/gpu/drm/stm/ltdc.c +++ b/drivers/gpu/drm/stm/ltdc.c @@ -426,8 +426,8 @@ static void ltdc_crtc_atomic_enable(struct drm_crtc *crtc, /* Enable IRQ */ reg_set(ldev->regs, LTDC_IER, IER_RRIE | IER_FUIE | IER_TERRIE); - /* Immediately commit the planes */ - reg_set(ldev->regs, LTDC_SRCR, SRCR_IMR); + /* Commit shadow registers = update planes at next vblank */ + reg_set(ldev->regs, LTDC_SRCR, SRCR_VBR); /* Enable LTDC */ reg_set(ldev->regs, LTDC_GCR, GCR_LTDCEN); -- 2.7.4