From 8cb0a27f93c1340fe07c02fdca86280d6d5d37fe Mon Sep 17 00:00:00 2001 From: Alexander Ivchenko Date: Fri, 29 Aug 2014 12:32:39 +0000 Subject: [PATCH] AVX-512. Add SI/DI masked interleave. gcc/ * config/i386/sse.md (define_insn "avx2_interleave_highv4di"): Add masking. (define_insn "vec_interleave_highv2di"): Ditto. (define_insn "avx2_interleave_lowv4di"): Ditto. (define_insn "vec_interleave_lowv2di"): Ditto. Co-Authored-By: Andrey Turetskiy Co-Authored-By: Anna Tikhonova Co-Authored-By: Ilya Tocar Co-Authored-By: Ilya Verbin Co-Authored-By: Kirill Yukhin Co-Authored-By: Maxim Kuznetsov Co-Authored-By: Michael Zolotukhin From-SVN: r214726 --- gcc/ChangeLog | 17 ++++++++++++++++- gcc/config/i386/sse.md | 50 +++++++++++++++++++++++++------------------------- 2 files changed, 41 insertions(+), 26 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ae65958..8470214 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,4 +1,19 @@ -2014-08-28 Alexander Ivchenko +2014-08-29 Alexander Ivchenko + Maxim Kuznetsov + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + + * config/i386/sse.md + (define_insn "avx2_interleave_highv4di"): Add masking. + (define_insn "vec_interleave_highv2di"): Ditto. + (define_insn "avx2_interleave_lowv4di"): Ditto. + (define_insn "vec_interleave_lowv2di"): Ditto. + +2014-08-29 Alexander Ivchenko Maxim Kuznetsov Anna Tikhonova Ilya Tocar diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index e11558e..8287b3b 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -7518,18 +7518,18 @@ }) ;; punpcklqdq and punpckhqdq are shorter than shufpd. -(define_insn "avx2_interleave_highv4di" - [(set (match_operand:V4DI 0 "register_operand" "=x") +(define_insn "avx2_interleave_highv4di" + [(set (match_operand:V4DI 0 "register_operand" "=v") (vec_select:V4DI (vec_concat:V8DI - (match_operand:V4DI 1 "register_operand" "x") - (match_operand:V4DI 2 "nonimmediate_operand" "xm")) + (match_operand:V4DI 1 "register_operand" "v") + (match_operand:V4DI 2 "nonimmediate_operand" "vm")) (parallel [(const_int 1) (const_int 5) (const_int 3) (const_int 7)])))] - "TARGET_AVX2" - "vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}" + "TARGET_AVX2 && " + "vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sselog") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -7550,36 +7550,36 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) -(define_insn "vec_interleave_highv2di" - [(set (match_operand:V2DI 0 "register_operand" "=x,x") +(define_insn "vec_interleave_highv2di" + [(set (match_operand:V2DI 0 "register_operand" "=x,v") (vec_select:V2DI (vec_concat:V4DI - (match_operand:V2DI 1 "register_operand" "0,x") - (match_operand:V2DI 2 "nonimmediate_operand" "xm,xm")) + (match_operand:V2DI 1 "register_operand" "0,v") + (match_operand:V2DI 2 "nonimmediate_operand" "xm,vm")) (parallel [(const_int 1) (const_int 3)])))] - "TARGET_SSE2" + "TARGET_SSE2 && " "@ punpckhqdq\t{%2, %0|%0, %2} - vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}" + vpunpckhqdq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sselog") (set_attr "prefix_data16" "1,*") - (set_attr "prefix" "orig,vex") + (set_attr "prefix" "orig,") (set_attr "mode" "TI")]) -(define_insn "avx2_interleave_lowv4di" - [(set (match_operand:V4DI 0 "register_operand" "=x") +(define_insn "avx2_interleave_lowv4di" + [(set (match_operand:V4DI 0 "register_operand" "=v") (vec_select:V4DI (vec_concat:V8DI - (match_operand:V4DI 1 "register_operand" "x") - (match_operand:V4DI 2 "nonimmediate_operand" "xm")) + (match_operand:V4DI 1 "register_operand" "v") + (match_operand:V4DI 2 "nonimmediate_operand" "vm")) (parallel [(const_int 0) (const_int 4) (const_int 2) (const_int 6)])))] - "TARGET_AVX2" - "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}" + "TARGET_AVX2 && " + "vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sselog") (set_attr "prefix" "vex") (set_attr "mode" "OI")]) @@ -7600,18 +7600,18 @@ (set_attr "prefix" "evex") (set_attr "mode" "XI")]) -(define_insn "vec_interleave_lowv2di" - [(set (match_operand:V2DI 0 "register_operand" "=x,x") +(define_insn "vec_interleave_lowv2di" + [(set (match_operand:V2DI 0 "register_operand" "=x,v") (vec_select:V2DI (vec_concat:V4DI - (match_operand:V2DI 1 "register_operand" "0,x") - (match_operand:V2DI 2 "nonimmediate_operand" "xm,xm")) + (match_operand:V2DI 1 "register_operand" "0,v") + (match_operand:V2DI 2 "nonimmediate_operand" "xm,vm")) (parallel [(const_int 0) (const_int 2)])))] - "TARGET_SSE2" + "TARGET_SSE2 && " "@ punpcklqdq\t{%2, %0|%0, %2} - vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}" + vpunpcklqdq\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,avx") (set_attr "type" "sselog") (set_attr "prefix_data16" "1,*") -- 2.7.4