From 8c3886b0ec9805a8ecad535c7aa92fa8d03147f1 Mon Sep 17 00:00:00 2001
From: Thomas Johnson <thomasj@synopsys.com>
Date: Tue, 24 Aug 2021 14:40:04 -0400
Subject: [PATCH] [ARC] Add ADC (addition with carry) and SBC (subtraction with
 carry) instructions

Differential Revision: https://reviews.llvm.org/D108672
---
 llvm/lib/Target/ARC/ARCInstrInfo.td   |   4 +
 llvm/test/MC/Disassembler/ARC/alu.txt | 144 ++++++++++++++++++++++++++++++++++
 2 files changed, 148 insertions(+)

diff --git a/llvm/lib/Target/ARC/ARCInstrInfo.td b/llvm/lib/Target/ARC/ARCInstrInfo.td
index 441a6d3..0b7a5a6 100644
--- a/llvm/lib/Target/ARC/ARCInstrInfo.td
+++ b/llvm/lib/Target/ARC/ARCInstrInfo.td
@@ -307,6 +307,10 @@ defm MPY  : ArcBinaryGEN4Inst<0b011010, "mpy",1>;
 defm MPYM : ArcBinaryGEN4Inst<0b011011, "mpym",1>;
 defm MPYMU : ArcBinaryGEN4Inst<0b011100, "mpymu",1>;
 defm SETEQ : ArcBinaryGEN4Inst<0b111000, "seteq",1>;
+let Uses=[STATUS32], isAsCheapAsAMove=0, isReMaterializable=0 in {
+  defm ADC : ArcBinaryGEN4Inst<0b000001, "adc",1>;
+  defm SBC : ArcBinaryGEN4Inst<0b000011, "sbc">;
+}
 
 // Patterns for 3 operand binary instructions.
 defm : MultiPat<add, ADD_rrr, ADD_rru6, ADD_rrlimm>;
diff --git a/llvm/test/MC/Disassembler/ARC/alu.txt b/llvm/test/MC/Disassembler/ARC/alu.txt
index 5e921ae..5e41865 100644
--- a/llvm/test/MC/Disassembler/ARC/alu.txt
+++ b/llvm/test/MC/Disassembler/ARC/alu.txt
@@ -272,3 +272,147 @@
 
 # CHECK: rsub.pnz.f %r15, %r15, 31
 0xce 0x27 0xef 0x97
+
+# CHECK: adc %r0, %r0, %r0
+0x01 0x20 0x00 0x00
+
+# CHECK: adc %r4, %r0, %r0
+0x01 0x20 0x04 0x00
+
+# CHECK: adc.f %r4, %r0, %r0
+0x01 0x20 0x04 0x80
+
+# CHECK: adc %r2, %r0, %r3
+0x01 0x20 0xc2 0x00
+
+# CHECK: adc %r2, %r0, %r4
+0x01 0x20 0x02 0x01
+
+# CHECK: adc %r2, %r7, %r4
+0x01 0x27 0x02 0x01
+
+# CHECK: adc.eq %r0, %r0, 1
+0xc1 0x20 0x61 0x00
+
+# CHECK: adc.lt %r6, %r6, 16
+0xc1 0x26 0x2b 0x04
+
+# CHECK: adc.le %r15, %r15, 31
+0xc1 0x27 0xec 0x17
+
+# CHECK: adc.gt %r0, %r0, 1
+0xc1 0x20 0x69 0x00
+
+# CHECK: adc.ge %r6, %r6, 16
+0xc1 0x26 0x2a 0x04
+
+# CHECK: adc.p %r15, %r15, 31
+0xc1 0x27 0xe3 0x17
+
+# CHECK: adc.n %r0, %r0, 1
+0xc1 0x20 0x64 0x00
+
+# CHECK: adc.vs %r6, %r6, 16
+0xc1 0x26 0x27 0x04
+
+# CHECK: adc.pnz %r15, %r15, 31
+0xc1 0x27 0xef 0x17
+
+# CHECK: adc.eq.f %r0, %r0, 1
+0xc1 0x20 0x61 0x80
+
+# CHECK: adc.lt.f %r6, %r6, 16
+0xc1 0x26 0x2b 0x84
+
+# CHECK: adc.le.f %r15, %r15, 31
+0xc1 0x27 0xec 0x97
+
+# CHECK: adc.gt.f %r0, %r0, 1
+0xc1 0x20 0x69 0x80
+
+# CHECK: adc.ge.f %r6, %r6, 16
+0xc1 0x26 0x2a 0x84
+
+# CHECK: adc.p.f %r15, %r15, 31
+0xc1 0x27 0xe3 0x97
+
+# CHECK: adc.n.f %r0, %r0, 1
+0xc1 0x20 0x64 0x80
+
+# CHECK: adc.vs.f %r6, %r6, 16
+0xc1 0x26 0x27 0x84
+
+# CHECK: adc.pnz.f %r15, %r15, 31
+0xc1 0x27 0xef 0x97
+
+# CHECK: sbc %r0, %r0, %r0
+0x03 0x20 0x00 0x00
+
+# CHECK: sbc %r4, %r0, %r0
+0x03 0x20 0x04 0x00
+
+# CHECK: sbc.f %r4, %r0, %r0
+0x03 0x20 0x04 0x80
+
+# CHECK: sbc %r2, %r0, %r3
+0x03 0x20 0xc2 0x00
+
+# CHECK: sbc %r2, %r0, %r4
+0x03 0x20 0x02 0x01
+
+# CHECK: sbc %r2, %r7, %r4
+0x03 0x27 0x02 0x01
+
+# CHECK: sbc.eq %r0, %r0, 1
+0xc3 0x20 0x61 0x00
+
+# CHECK: sbc.lt %r6, %r6, 16
+0xc3 0x26 0x2b 0x04
+
+# CHECK: sbc.le %r15, %r15, 31
+0xc3 0x27 0xec 0x17
+
+# CHECK: sbc.gt %r0, %r0, 1
+0xc3 0x20 0x69 0x00
+
+# CHECK: sbc.ge %r6, %r6, 16
+0xc3 0x26 0x2a 0x04
+
+# CHECK: sbc.p %r15, %r15, 31
+0xc3 0x27 0xe3 0x17
+
+# CHECK: sbc.n %r0, %r0, 1
+0xc3 0x20 0x64 0x00
+
+# CHECK: sbc.vs %r6, %r6, 16
+0xc3 0x26 0x27 0x04
+
+# CHECK: sbc.pnz %r15, %r15, 31
+0xc3 0x27 0xef 0x17
+
+# CHECK: sbc.eq.f %r0, %r0, 1
+0xc3 0x20 0x61 0x80
+
+# CHECK: sbc.lt.f %r6, %r6, 16
+0xc3 0x26 0x2b 0x84
+
+# CHECK: sbc.le.f %r15, %r15, 31
+0xc3 0x27 0xec 0x97
+
+# CHECK: sbc.gt.f %r0, %r0, 1
+0xc3 0x20 0x69 0x80
+
+# CHECK: sbc.ge.f %r6, %r6, 16
+0xc3 0x26 0x2a 0x84
+
+# CHECK: sbc.p.f %r15, %r15, 31
+0xc3 0x27 0xe3 0x97
+
+# CHECK: sbc.n.f %r0, %r0, 1
+0xc3 0x20 0x64 0x80
+
+# CHECK: sbc.vs.f %r6, %r6, 16
+0xc3 0x26 0x27 0x84
+
+# CHECK: sbc.pnz.f %r15, %r15, 31
+0xc3 0x27 0xef 0x97
-- 
2.7.4