From 8b5c53e62c98e52b555feb52ff8fa8fc913141e7 Mon Sep 17 00:00:00 2001 From: John Whitmore Date: Fri, 13 Jul 2018 12:23:01 +0100 Subject: [PATCH] staging:rtl8192u: Remove typdef from enumeration RF90_RADIO_PATH_E - Style Checkpatch warns about the creation of new types. This patch simply removes the typedef from the enumeration RF90_RADIO_PATH_E to clear this checkpatch warning. There should be no impact on run time code execution, as this is a coding style issue only. Signed-off-by: John Whitmore Signed-off-by: Greg Kroah-Hartman --- drivers/staging/rtl8192u/r8190_rtl8256.c | 42 ++++++++++++++++---------------- drivers/staging/rtl8192u/r8192U_core.c | 4 +-- drivers/staging/rtl8192u/r819xU_phy.c | 31 ++++++++++++++--------- drivers/staging/rtl8192u/r819xU_phy.h | 15 +++++++----- 4 files changed, 51 insertions(+), 41 deletions(-) diff --git a/drivers/staging/rtl8192u/r8190_rtl8256.c b/drivers/staging/rtl8192u/r8190_rtl8256.c index 02bdd93..9f35dcb 100644 --- a/drivers/staging/rtl8192u/r8190_rtl8256.c +++ b/drivers/staging/rtl8192u/r8190_rtl8256.c @@ -41,16 +41,16 @@ void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwi || priv->card_8192_version == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ rtl8192_phy_SetRFReg(dev, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x100); /* phy para:1ba */ rtl8192_phy_SetRFReg(dev, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3d7); rtl8192_phy_SetRFReg(dev, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x021); rtl8192_phy_SetRFReg(dev, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); } else { RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); @@ -58,15 +58,15 @@ void PHY_SetRF8256Bandwidth(struct net_device *dev, enum ht_channel_width Bandwi break; case HT_CHANNEL_WIDTH_20_40: if (priv->card_8192_version == VERSION_819xU_A || priv->card_8192_version == VERSION_819xU_B) { /* 8256 D-cut, E-cut, xiong: consider it later! */ - rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); /* phy para:3ba */ - rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3df); - rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0a1); + rtl8192_phy_SetRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, 0x0b, bMask12Bits, 0x300); /* phy para:3ba */ + rtl8192_phy_SetRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, 0x2c, bMask12Bits, 0x3df); + rtl8192_phy_SetRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, 0x0e, bMask12Bits, 0x0a1); if (priv->chan == 3 || priv->chan == 9) /* I need to set priv->chan whenever current channel changes */ - rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b); + rtl8192_phy_SetRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x59b); else - rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); + rtl8192_phy_SetRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, 0x14, bMask12Bits, 0x5ab); } else { RT_TRACE(COMP_ERR, "PHY_SetRF8256Bandwidth(): unknown hardware version\n"); } @@ -115,14 +115,14 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev) u8 ConstRetryTimes = 5, RetryTimes = 5; u8 ret = 0; /* Initialize RF */ - for (eRFPath = (RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath < priv->NumTotalRFPath; eRFPath++) { + for (eRFPath = (enum RF90_RADIO_PATH_E)RF90_PATH_A; eRFPath < priv->NumTotalRFPath; eRFPath++) { if (!rtl8192_phy_CheckIsLegalRFPath(dev, eRFPath)) continue; pPhyReg = &priv->PHYRegDef[eRFPath]; /* Joseph test for shorten RF config - * pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord); + * pHalData->RfReg0Value[eRFPath] = rtl8192_phy_QueryRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, rGlobalCtrl, bMaskDWord); * ----Store original RFENV control type */ switch (eRFPath) { @@ -146,12 +146,12 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev) rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireAddressLength, 0x0); /* Set 0 to 4 bits for Z-serial and set 1 to 6 bits for 8258 */ rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, b3WireDataLength, 0x0); /* Set 0 to 12 bits for Z-serial and 8258, and set 1 to 14 bits for ??? */ - rtl8192_phy_SetRFReg(dev, (RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf); + rtl8192_phy_SetRFReg(dev, (enum RF90_RADIO_PATH_E) eRFPath, 0x0, bMask12Bits, 0xbf); /* Check RF block (for FPGA platform only)---- * TODO: this function should be removed on ASIC , Emily 2007.2.2 */ - if (rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (RF90_RADIO_PATH_E)eRFPath)) { + if (rtl8192_phy_checkBBAndRF(dev, HW90_BLOCK_RF, (enum RF90_RADIO_PATH_E)eRFPath)) { RT_TRACE(COMP_ERR, "PHY_RF8256_Config():Check Radio[%d] Fail!!\n", eRFPath); goto phy_RF8256_Config_ParaFile_Fail; } @@ -162,32 +162,32 @@ void phy_RF8256_Config_ParaFile(struct net_device *dev) switch (eRFPath) { case RF90_PATH_A: while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { - ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); - RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (enum RF90_RADIO_PATH_E)eRFPath); + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RetryTimes--; } break; case RF90_PATH_B: while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { - ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); - RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (enum RF90_RADIO_PATH_E)eRFPath); + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RetryTimes--; } break; case RF90_PATH_C: while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { - ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); - RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (enum RF90_RADIO_PATH_E)eRFPath); + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RetryTimes--; } break; case RF90_PATH_D: while (RF3_Final_Value != RegValueToBeCheck && RetryTimes != 0) { - ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (RF90_RADIO_PATH_E)eRFPath); - RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); + ret = rtl8192_phy_ConfigRFWithHeaderFile(dev, (enum RF90_RADIO_PATH_E)eRFPath); + RF3_Final_Value = rtl8192_phy_QueryRFReg(dev, (enum RF90_RADIO_PATH_E)eRFPath, RegOffSetToBeCheck, bMask12Bits); RT_TRACE(COMP_RF, "RF %d %d register final value: %x\n", eRFPath, RegOffSetToBeCheck, RF3_Final_Value); RetryTimes--; } diff --git a/drivers/staging/rtl8192u/r8192U_core.c b/drivers/staging/rtl8192u/r8192U_core.c index c01e8d7..cf39c0b 100644 --- a/drivers/staging/rtl8192u/r8192U_core.c +++ b/drivers/staging/rtl8192u/r8192U_core.c @@ -2897,7 +2897,7 @@ static bool rtl8192_adapter_start(struct net_device *dev) */ for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) PHY_SetRFReg(Adapter, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); } else if (pMgntInfo->RfOffReason > RF_CHANGE_BY_PS) { /* H/W or S/W RF OFF before sleep. */ @@ -2923,7 +2923,7 @@ static bool rtl8192_adapter_start(struct net_device *dev) */ for (eRFPath = 0; eRFPath < pHalData->NumTotalRFPath; eRFPath++) PHY_SetRFReg(Adapter, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, 0x4, 0xC00, 0x0); } } diff --git a/drivers/staging/rtl8192u/r819xU_phy.c b/drivers/staging/rtl8192u/r819xU_phy.c index 0462de6..3df4775 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.c +++ b/drivers/staging/rtl8192u/r819xU_phy.c @@ -108,11 +108,13 @@ u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask) return (reg & bitmask) >> bitshift; } -static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, +static u32 phy_FwRFSerialRead(struct net_device *dev, + enum RF90_RADIO_PATH_E eRFPath, u32 offset); static void phy_FwRFSerialWrite(struct net_device *dev, - RF90_RADIO_PATH_E eRFPath, u32 offset, + enum RF90_RADIO_PATH_E eRFPath, + u32 offset, u32 data); /****************************************************************************** @@ -130,7 +132,7 @@ static void phy_FwRFSerialWrite(struct net_device *dev, * ---need more spec for this information. ******************************************************************************/ static u32 rtl8192_phy_RFSerialRead(struct net_device *dev, - RF90_RADIO_PATH_E eRFPath, u32 offset) + enum RF90_RADIO_PATH_E eRFPath, u32 offset) { struct r8192_priv *priv = ieee80211_priv(dev); u32 ret = 0; @@ -215,7 +217,8 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device *dev, * --------------------------------------------------------------------------- *****************************************************************************/ static void rtl8192_phy_RFSerialWrite(struct net_device *dev, - RF90_RADIO_PATH_E eRFPath, u32 offset, + enum RF90_RADIO_PATH_E eRFPath, + u32 offset, u32 data) { struct r8192_priv *priv = ieee80211_priv(dev); @@ -279,7 +282,8 @@ static void rtl8192_phy_RFSerialWrite(struct net_device *dev, * return: none * notice: *****************************************************************************/ -void rtl8192_phy_SetRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, +void rtl8192_phy_SetRFReg(struct net_device *dev, + enum RF90_RADIO_PATH_E eRFPath, u32 reg_addr, u32 bitmask, u32 data) { struct r8192_priv *priv = ieee80211_priv(dev); @@ -327,7 +331,8 @@ void rtl8192_phy_SetRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, * return: u32 data //the readback register value * notice: *****************************************************************************/ -u32 rtl8192_phy_QueryRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, +u32 rtl8192_phy_QueryRFReg(struct net_device *dev, + enum RF90_RADIO_PATH_E eRFPath, u32 reg_addr, u32 bitmask) { u32 reg, bitshift; @@ -357,7 +362,8 @@ u32 rtl8192_phy_QueryRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, * return: u32 * notice: ****************************************************************************/ -static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, +static u32 phy_FwRFSerialRead(struct net_device *dev, + enum RF90_RADIO_PATH_E eRFPath, u32 offset) { u32 reg = 0; @@ -422,7 +428,8 @@ static u32 phy_FwRFSerialRead(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, * notice: ****************************************************************************/ static void phy_FwRFSerialWrite(struct net_device *dev, - RF90_RADIO_PATH_E eRFPath, u32 offset, u32 data) + enum RF90_RADIO_PATH_E eRFPath, + u32 offset, u32 data) { u8 time = 0; u32 tmp; @@ -696,7 +703,7 @@ static void rtl8192_InitBBRFRegDef(struct net_device *dev) * notice: This function may be removed in the ASIC ******************************************************************************/ u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, enum HW90_BLOCK_E CheckBlock, - RF90_RADIO_PATH_E eRFPath) + enum RF90_RADIO_PATH_E eRFPath) { u8 ret = 0; u32 i, CheckTimes = 4, reg = 0; @@ -791,7 +798,7 @@ static void rtl8192_BB_Config_ParaFile(struct net_device *dev) eCheckItem <= HW90_BLOCK_PHY1; eCheckItem++) { /* don't care RF path */ status = rtl8192_phy_checkBBAndRF(dev, (enum HW90_BLOCK_E)eCheckItem, - (RF90_RADIO_PATH_E)0); + (enum RF90_RADIO_PATH_E)0); if (status != 0) { RT_TRACE((COMP_ERR | COMP_PHY), "PHY_RF8256_Config(): Check PHY%d Fail!!\n", @@ -969,7 +976,7 @@ void rtl8192_phy_updateInitGain(struct net_device *dev) * notice: Delay may be required for RF configuration *****************************************************************************/ u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, - RF90_RADIO_PATH_E eRFPath) + enum RF90_RADIO_PATH_E eRFPath) { int i; @@ -1387,7 +1394,7 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, case CmdID_RF_WriteReg: for (eRFPath = 0; eRFPath < RF90_PATH_MAX; eRFPath++) { rtl8192_phy_SetRFReg(dev, - (RF90_RADIO_PATH_E)eRFPath, + (enum RF90_RADIO_PATH_E)eRFPath, CurrentCmd->Para1, bZebra1_ChannelNum, CurrentCmd->Para2); diff --git a/drivers/staging/rtl8192u/r819xU_phy.h b/drivers/staging/rtl8192u/r819xU_phy.h index 0f680a0..d93da23 100644 --- a/drivers/staging/rtl8192u/r819xU_phy.h +++ b/drivers/staging/rtl8192u/r819xU_phy.h @@ -42,13 +42,13 @@ enum HW90_BLOCK_E { HW90_BLOCK_MAXIMUM = 4, /* Never use this */ }; -typedef enum _RF90_RADIO_PATH { +enum RF90_RADIO_PATH_E { RF90_PATH_A = 0, /* Radio Path A */ RF90_PATH_B = 1, /* Radio Path B */ RF90_PATH_C = 2, /* Radio Path C */ RF90_PATH_D = 3, /* Radio Path D */ RF90_PATH_MAX /* Max RF number 92 support */ -} RF90_RADIO_PATH_E, *PRF90_RADIO_PATH_E; +}; #define bMaskByte0 0xff #define bMaskByte1 0xff00 @@ -62,21 +62,24 @@ u8 rtl8192_phy_CheckIsLegalRFPath(struct net_device *dev, u32 eRFPath); void rtl8192_setBBreg(struct net_device *dev, u32 reg_addr, u32 bitmask, u32 data); u32 rtl8192_QueryBBReg(struct net_device *dev, u32 reg_addr, u32 bitmask); -void rtl8192_phy_SetRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, +void rtl8192_phy_SetRFReg(struct net_device *dev, + enum RF90_RADIO_PATH_E eRFPath, u32 reg_addr, u32 bitmask, u32 data); -u32 rtl8192_phy_QueryRFReg(struct net_device *dev, RF90_RADIO_PATH_E eRFPath, +u32 rtl8192_phy_QueryRFReg(struct net_device *dev, + enum RF90_RADIO_PATH_E eRFPath, u32 reg_addr, u32 bitmask); void rtl8192_phy_configmac(struct net_device *dev); void rtl8192_phyConfigBB(struct net_device *dev, u8 ConfigType); u8 rtl8192_phy_checkBBAndRF(struct net_device *dev, - enum HW90_BLOCK_E CheckBlock, RF90_RADIO_PATH_E eRFPath); + enum HW90_BLOCK_E CheckBlock, + enum RF90_RADIO_PATH_E eRFPath); void rtl8192_BBConfig(struct net_device *dev); void rtl8192_phy_getTxPower(struct net_device *dev); void rtl8192_phy_setTxPower(struct net_device *dev, u8 channel); void rtl8192_phy_RFConfig(struct net_device *dev); void rtl8192_phy_updateInitGain(struct net_device *dev); u8 rtl8192_phy_ConfigRFWithHeaderFile(struct net_device *dev, - RF90_RADIO_PATH_E eRFPath); + enum RF90_RADIO_PATH_E eRFPath); u8 rtl8192_phy_SwChnl(struct net_device *dev, u8 channel); void rtl8192_SetBWMode(struct net_device *dev, -- 2.7.4