From 8ab8b3fad7a6e08452e30aaa3a75d6ec89ca5bf2 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sun, 6 Jun 2021 20:00:34 +0100 Subject: [PATCH] [X86][SSE] LowerFP_TO_INT - remove dead code. NFCI. Non-Strict v2f32->v2i64 cases have already early-returned to be handled by legalization. --- llvm/lib/Target/X86/X86ISelLowering.cpp | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index ea892b6..b89e1674 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -21345,7 +21345,7 @@ SDValue X86TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const { return Res; } - if (VT == MVT::v2i64 && SrcVT == MVT::v2f32) { + if (VT == MVT::v2i64 && SrcVT == MVT::v2f32) { if (!Subtarget.hasVLX()) { // Non-strict nodes without VLX can we widened to v4f32->v4i64 by type // legalizer and then widened again by vector op legalization. @@ -21360,9 +21360,7 @@ SDValue X86TargetLowering::LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) const { SDValue Chain = Tmp.getValue(1); Tmp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, MVT::v2i64, Tmp, DAG.getIntPtrConstant(0, dl)); - if (IsStrict) - return DAG.getMergeValues({Tmp, Chain}, dl); - return Tmp; + return DAG.getMergeValues({Tmp, Chain}, dl); } assert(Subtarget.hasDQI() && Subtarget.hasVLX() && "Requires AVX512DQVL"); -- 2.7.4