From 89d777a572459d6ea726b609838beaef0c1b94a7 Mon Sep 17 00:00:00 2001 From: Jordan Crouse Date: Mon, 28 Nov 2016 12:28:31 -0700 Subject: [PATCH] drm/msm: Remove 'src_clk' from adreno configuration The adreno code inherited a silly workaround from downstream from the bad old days before decent clock control. grp_clk[0] (named 'src_clk') doesn't actually exist - it was used as a proxy for whatever the core clock actually was (usually 'core_clk'). All targets should be able to correctly request 'core_clk' and get the right thing back so zap the anachronism and directly use grp_clk[0] to control the clock rate. Signed-off-by: Jordan Crouse Signed-off-by: Rob Clark --- drivers/gpu/drm/msm/msm_gpu.c | 36 +++++++++++++----------------------- drivers/gpu/drm/msm/msm_gpu.h | 2 +- 2 files changed, 14 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_gpu.c b/drivers/gpu/drm/msm/msm_gpu.c index 1277088..3d6e3b7 100644 --- a/drivers/gpu/drm/msm/msm_gpu.c +++ b/drivers/gpu/drm/msm/msm_gpu.c @@ -91,21 +91,16 @@ static int disable_pwrrail(struct msm_gpu *gpu) static int enable_clk(struct msm_gpu *gpu) { - struct clk *rate_clk = NULL; int i; - /* NOTE: kgsl_pwrctrl_clk() ignores grp_clks[0].. */ - for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i > 0; i--) { - if (gpu->grp_clks[i]) { - clk_prepare(gpu->grp_clks[i]); - rate_clk = gpu->grp_clks[i]; - } - } + if (gpu->grp_clks[0] && gpu->fast_rate) + clk_set_rate(gpu->grp_clks[0], gpu->fast_rate); - if (rate_clk && gpu->fast_rate) - clk_set_rate(rate_clk, gpu->fast_rate); + for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i >= 0; i--) + if (gpu->grp_clks[i]) + clk_prepare(gpu->grp_clks[i]); - for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i > 0; i--) + for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i >= 0; i--) if (gpu->grp_clks[i]) clk_enable(gpu->grp_clks[i]); @@ -114,24 +109,19 @@ static int enable_clk(struct msm_gpu *gpu) static int disable_clk(struct msm_gpu *gpu) { - struct clk *rate_clk = NULL; int i; - /* NOTE: kgsl_pwrctrl_clk() ignores grp_clks[0].. */ - for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i > 0; i--) { - if (gpu->grp_clks[i]) { + for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i >= 0; i--) + if (gpu->grp_clks[i]) clk_disable(gpu->grp_clks[i]); - rate_clk = gpu->grp_clks[i]; - } - } - if (rate_clk && gpu->slow_rate) - clk_set_rate(rate_clk, gpu->slow_rate); - - for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i > 0; i--) + for (i = ARRAY_SIZE(gpu->grp_clks) - 1; i >= 0; i--) if (gpu->grp_clks[i]) clk_unprepare(gpu->grp_clks[i]); + if (gpu->grp_clks[0] && gpu->slow_rate) + clk_set_rate(gpu->grp_clks[0], gpu->slow_rate); + return 0; } @@ -563,7 +553,7 @@ static irqreturn_t irq_handler(int irq, void *data) } static const char *clk_names[] = { - "src_clk", "core_clk", "iface_clk", "mem_clk", "mem_iface_clk", + "core_clk", "iface_clk", "mem_clk", "mem_iface_clk", "alt_mem_iface_clk", }; diff --git a/drivers/gpu/drm/msm/msm_gpu.h b/drivers/gpu/drm/msm/msm_gpu.h index c4c39d3..10252d0 100644 --- a/drivers/gpu/drm/msm/msm_gpu.h +++ b/drivers/gpu/drm/msm/msm_gpu.h @@ -103,7 +103,7 @@ struct msm_gpu { /* Power Control: */ struct regulator *gpu_reg, *gpu_cx; - struct clk *ebi1_clk, *grp_clks[6]; + struct clk *ebi1_clk, *grp_clks[5]; uint32_t fast_rate, slow_rate, bus_freq; #ifdef DOWNSTREAM_CONFIG_MSM_BUS_SCALING -- 2.7.4