From 89aa3097c23c68a459a9795d8875290f8e48d8d8 Mon Sep 17 00:00:00 2001 From: Adam Nemet Date: Tue, 29 Apr 2008 23:27:01 +0000 Subject: [PATCH] * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for the two drem and the two dremu macros. --- opcodes/ChangeLog | 5 +++++ opcodes/mips-opc.c | 8 ++++---- 2 files changed, 9 insertions(+), 4 deletions(-) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 6f55be2..26356c4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2008-04-29 Adam Nemet + + * mips-opc.c (mips_builtin_opcodes): Set field `match' to 0 for + the two drem and the two dremu macros. + 2008-04-28 Adam Nemet * mips-opc.c (mips_builtin_opcodes): Mark prefx and c1 diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 63bec4f..1787c9e 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -630,11 +630,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d|RD_t, 0, I3 }, /* dsub 0 */ {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d|RD_t, 0, I3 }, /* dsubu 0*/ {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, -{"drem", "d,v,t", 3, (int) M_DREM_3, INSN_MACRO, 0, I3 }, -{"drem", "d,v,I", 3, (int) M_DREM_3I, INSN_MACRO, 0, I3 }, +{"drem", "d,v,t", 0, (int) M_DREM_3, INSN_MACRO, 0, I3 }, +{"drem", "d,v,I", 0, (int) M_DREM_3I, INSN_MACRO, 0, I3 }, {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, 0, I3 }, -{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, 0, I3 }, -{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, 0, I3 }, +{"dremu", "d,v,t", 0, (int) M_DREMU_3, INSN_MACRO, 0, I3 }, +{"dremu", "d,v,I", 0, (int) M_DREMU_3I, INSN_MACRO, 0, I3 }, {"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5 }, {"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, 0, I3 }, {"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, 0, I3 }, -- 2.7.4