From 88a411a8a09102b89ea52fe2511265edd3393cf2 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Andreas=20F=C3=A4rber?= Date: Sun, 30 Jun 2013 13:09:00 +0200 Subject: [PATCH] net/rtl8139: QOM parent field cleanup MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Replace direct uses of RTL8139State::dev with QOM casts and rename it to parent_obj. Acked-by: Peter Crosthwaite Signed-off-by: Andreas Färber --- hw/net/rtl8139.c | 88 +++++++++++++++++++++++++++++++------------------------- 1 file changed, 49 insertions(+), 39 deletions(-) diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c index 7f89d5a..6552034 100644 --- a/hw/net/rtl8139.c +++ b/hw/net/rtl8139.c @@ -433,7 +433,10 @@ typedef struct RTL8139TallyCounters static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters); typedef struct RTL8139State { - PCIDevice dev; + /*< private >*/ + PCIDevice parent_obj; + /*< public >*/ + uint8_t phys[8]; /* mac address */ uint8_t mult[8]; /* multicast mask array */ @@ -706,13 +709,14 @@ static void prom9346_set_wire(RTL8139State *s, int eecs, int eesk, int eedi) static void rtl8139_update_irq(RTL8139State *s) { + PCIDevice *d = PCI_DEVICE(s); int isr; isr = (s->IntrStatus & s->IntrMask) & 0xffff; DPRINTF("Set IRQ to %d (%04x %04x)\n", isr ? 1 : 0, s->IntrStatus, s->IntrMask); - qemu_set_irq(s->dev.irq[0], (isr != 0)); + qemu_set_irq(d->irq[0], (isr != 0)); } static int rtl8139_RxWrap(RTL8139State *s) @@ -743,6 +747,8 @@ static int rtl8139_cp_transmitter_enabled(RTL8139State *s) static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) { + PCIDevice *d = PCI_DEVICE(s); + if (s->RxBufAddr + size > s->RxBufferSize) { int wrapped = MOD2(s->RxBufAddr + size, s->RxBufferSize); @@ -754,14 +760,14 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) if (size > wrapped) { - pci_dma_write(&s->dev, s->RxBuf + s->RxBufAddr, + pci_dma_write(d, s->RxBuf + s->RxBufAddr, buf, size-wrapped); } /* reset buffer pointer */ s->RxBufAddr = 0; - pci_dma_write(&s->dev, s->RxBuf + s->RxBufAddr, + pci_dma_write(d, s->RxBuf + s->RxBufAddr, buf + (size-wrapped), wrapped); s->RxBufAddr = wrapped; @@ -771,7 +777,7 @@ static void rtl8139_write_buffer(RTL8139State *s, const void *buf, int size) } /* non-wrapping path or overwrapping enabled */ - pci_dma_write(&s->dev, s->RxBuf + s->RxBufAddr, buf, size); + pci_dma_write(d, s->RxBuf + s->RxBufAddr, buf, size); s->RxBufAddr += size; } @@ -814,6 +820,7 @@ static int rtl8139_can_receive(NetClientState *nc) static ssize_t rtl8139_do_receive(NetClientState *nc, const uint8_t *buf, size_t size_, int do_interrupt) { RTL8139State *s = qemu_get_nic_opaque(nc); + PCIDevice *d = PCI_DEVICE(s); /* size is the length of the buffer passed to the driver */ int size = size_; const uint8_t *dot1q_buf = NULL; @@ -978,13 +985,13 @@ static ssize_t rtl8139_do_receive(NetClientState *nc, const uint8_t *buf, size_t uint32_t val, rxdw0,rxdw1,rxbufLO,rxbufHI; - pci_dma_read(&s->dev, cplus_rx_ring_desc, &val, 4); + pci_dma_read(d, cplus_rx_ring_desc, &val, 4); rxdw0 = le32_to_cpu(val); - pci_dma_read(&s->dev, cplus_rx_ring_desc+4, &val, 4); + pci_dma_read(d, cplus_rx_ring_desc+4, &val, 4); rxdw1 = le32_to_cpu(val); - pci_dma_read(&s->dev, cplus_rx_ring_desc+8, &val, 4); + pci_dma_read(d, cplus_rx_ring_desc+8, &val, 4); rxbufLO = le32_to_cpu(val); - pci_dma_read(&s->dev, cplus_rx_ring_desc+12, &val, 4); + pci_dma_read(d, cplus_rx_ring_desc+12, &val, 4); rxbufHI = le32_to_cpu(val); DPRINTF("+++ C+ mode RX descriptor %d %08x %08x %08x %08x\n", @@ -1052,12 +1059,12 @@ static ssize_t rtl8139_do_receive(NetClientState *nc, const uint8_t *buf, size_t /* receive/copy to target memory */ if (dot1q_buf) { - pci_dma_write(&s->dev, rx_addr, buf, 2 * ETHER_ADDR_LEN); - pci_dma_write(&s->dev, rx_addr + 2 * ETHER_ADDR_LEN, + pci_dma_write(d, rx_addr, buf, 2 * ETHER_ADDR_LEN); + pci_dma_write(d, rx_addr + 2 * ETHER_ADDR_LEN, buf + 2 * ETHER_ADDR_LEN + VLAN_HLEN, size - 2 * ETHER_ADDR_LEN); } else { - pci_dma_write(&s->dev, rx_addr, buf, size); + pci_dma_write(d, rx_addr, buf, size); } if (s->CpCmd & CPlusRxChkSum) @@ -1067,7 +1074,7 @@ static ssize_t rtl8139_do_receive(NetClientState *nc, const uint8_t *buf, size_t /* write checksum */ val = cpu_to_le32(crc32(0, buf, size_)); - pci_dma_write(&s->dev, rx_addr+size, (uint8_t *)&val, 4); + pci_dma_write(d, rx_addr+size, (uint8_t *)&val, 4); /* first segment of received packet flag */ #define CP_RX_STATUS_FS (1<<29) @@ -1113,9 +1120,9 @@ static ssize_t rtl8139_do_receive(NetClientState *nc, const uint8_t *buf, size_t /* update ring data */ val = cpu_to_le32(rxdw0); - pci_dma_write(&s->dev, cplus_rx_ring_desc, (uint8_t *)&val, 4); + pci_dma_write(d, cplus_rx_ring_desc, (uint8_t *)&val, 4); val = cpu_to_le32(rxdw1); - pci_dma_write(&s->dev, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); + pci_dma_write(d, cplus_rx_ring_desc+4, (uint8_t *)&val, 4); /* update tally counter */ ++s->tally_counters.RxOk; @@ -1298,49 +1305,50 @@ static void RTL8139TallyCounters_clear(RTL8139TallyCounters* counters) static void RTL8139TallyCounters_dma_write(RTL8139State *s, dma_addr_t tc_addr) { + PCIDevice *d = PCI_DEVICE(s); RTL8139TallyCounters *tally_counters = &s->tally_counters; uint16_t val16; uint32_t val32; uint64_t val64; val64 = cpu_to_le64(tally_counters->TxOk); - pci_dma_write(&s->dev, tc_addr + 0, (uint8_t *)&val64, 8); + pci_dma_write(d, tc_addr + 0, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->RxOk); - pci_dma_write(&s->dev, tc_addr + 8, (uint8_t *)&val64, 8); + pci_dma_write(d, tc_addr + 8, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->TxERR); - pci_dma_write(&s->dev, tc_addr + 16, (uint8_t *)&val64, 8); + pci_dma_write(d, tc_addr + 16, (uint8_t *)&val64, 8); val32 = cpu_to_le32(tally_counters->RxERR); - pci_dma_write(&s->dev, tc_addr + 24, (uint8_t *)&val32, 4); + pci_dma_write(d, tc_addr + 24, (uint8_t *)&val32, 4); val16 = cpu_to_le16(tally_counters->MissPkt); - pci_dma_write(&s->dev, tc_addr + 28, (uint8_t *)&val16, 2); + pci_dma_write(d, tc_addr + 28, (uint8_t *)&val16, 2); val16 = cpu_to_le16(tally_counters->FAE); - pci_dma_write(&s->dev, tc_addr + 30, (uint8_t *)&val16, 2); + pci_dma_write(d, tc_addr + 30, (uint8_t *)&val16, 2); val32 = cpu_to_le32(tally_counters->Tx1Col); - pci_dma_write(&s->dev, tc_addr + 32, (uint8_t *)&val32, 4); + pci_dma_write(d, tc_addr + 32, (uint8_t *)&val32, 4); val32 = cpu_to_le32(tally_counters->TxMCol); - pci_dma_write(&s->dev, tc_addr + 36, (uint8_t *)&val32, 4); + pci_dma_write(d, tc_addr + 36, (uint8_t *)&val32, 4); val64 = cpu_to_le64(tally_counters->RxOkPhy); - pci_dma_write(&s->dev, tc_addr + 40, (uint8_t *)&val64, 8); + pci_dma_write(d, tc_addr + 40, (uint8_t *)&val64, 8); val64 = cpu_to_le64(tally_counters->RxOkBrd); - pci_dma_write(&s->dev, tc_addr + 48, (uint8_t *)&val64, 8); + pci_dma_write(d, tc_addr + 48, (uint8_t *)&val64, 8); val32 = cpu_to_le32(tally_counters->RxOkMul); - pci_dma_write(&s->dev, tc_addr + 56, (uint8_t *)&val32, 4); + pci_dma_write(d, tc_addr + 56, (uint8_t *)&val32, 4); val16 = cpu_to_le16(tally_counters->TxAbt); - pci_dma_write(&s->dev, tc_addr + 60, (uint8_t *)&val16, 2); + pci_dma_write(d, tc_addr + 60, (uint8_t *)&val16, 2); val16 = cpu_to_le16(tally_counters->TxUndrn); - pci_dma_write(&s->dev, tc_addr + 62, (uint8_t *)&val16, 2); + pci_dma_write(d, tc_addr + 62, (uint8_t *)&val16, 2); } /* Loads values of tally counters from VM state file */ @@ -1830,13 +1838,14 @@ static int rtl8139_transmit_one(RTL8139State *s, int descriptor) DPRINTF("+++ transmitting from descriptor %d\n", descriptor); + PCIDevice *d = PCI_DEVICE(s); int txsize = s->TxStatus[descriptor] & 0x1fff; uint8_t txbuffer[0x2000]; DPRINTF("+++ transmit reading %d bytes from host memory at 0x%08x\n", txsize, s->TxAddr[descriptor]); - pci_dma_read(&s->dev, s->TxAddr[descriptor], txbuffer, txsize); + pci_dma_read(d, s->TxAddr[descriptor], txbuffer, txsize); /* Mark descriptor as transferred */ s->TxStatus[descriptor] |= TxHostOwns; @@ -1955,6 +1964,7 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) return 0 ; } + PCIDevice *d = PCI_DEVICE(s); int descriptor = s->currCPlusTxDesc; dma_addr_t cplus_tx_ring_desc = rtl8139_addr64(s->TxAddr[0], s->TxAddr[1]); @@ -1968,13 +1978,13 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) uint32_t val, txdw0,txdw1,txbufLO,txbufHI; - pci_dma_read(&s->dev, cplus_tx_ring_desc, (uint8_t *)&val, 4); + pci_dma_read(d, cplus_tx_ring_desc, (uint8_t *)&val, 4); txdw0 = le32_to_cpu(val); - pci_dma_read(&s->dev, cplus_tx_ring_desc+4, (uint8_t *)&val, 4); + pci_dma_read(d, cplus_tx_ring_desc+4, (uint8_t *)&val, 4); txdw1 = le32_to_cpu(val); - pci_dma_read(&s->dev, cplus_tx_ring_desc+8, (uint8_t *)&val, 4); + pci_dma_read(d, cplus_tx_ring_desc+8, (uint8_t *)&val, 4); txbufLO = le32_to_cpu(val); - pci_dma_read(&s->dev, cplus_tx_ring_desc+12, (uint8_t *)&val, 4); + pci_dma_read(d, cplus_tx_ring_desc+12, (uint8_t *)&val, 4); txbufHI = le32_to_cpu(val); DPRINTF("+++ C+ mode TX descriptor %d %08x %08x %08x %08x\n", descriptor, @@ -2081,7 +2091,7 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) DMA_ADDR_FMT" to offset %d\n", txsize, tx_addr, s->cplus_txbuffer_offset); - pci_dma_read(&s->dev, tx_addr, + pci_dma_read(d, tx_addr, s->cplus_txbuffer + s->cplus_txbuffer_offset, txsize); s->cplus_txbuffer_offset += txsize; @@ -2109,7 +2119,7 @@ static int rtl8139_cplus_transmit_one(RTL8139State *s) /* update ring data */ val = cpu_to_le32(txdw0); - pci_dma_write(&s->dev, cplus_tx_ring_desc, (uint8_t *)&val, 4); + pci_dma_write(d, cplus_tx_ring_desc, (uint8_t *)&val, 4); /* Now decide if descriptor being processed is holding the last segment of packet */ if (txdw0 & CP_TX_LS) @@ -3282,7 +3292,7 @@ static const VMStateDescription vmstate_rtl8139 = { .post_load = rtl8139_post_load, .pre_save = rtl8139_pre_save, .fields = (VMStateField []) { - VMSTATE_PCI_DEVICE(dev, RTL8139State), + VMSTATE_PCI_DEVICE(parent_obj, RTL8139State), VMSTATE_PARTIAL_BUFFER(phys, RTL8139State, 6), VMSTATE_BUFFER(mult, RTL8139State), VMSTATE_UINT32_ARRAY(TxStatus, RTL8139State, 4), @@ -3490,7 +3500,7 @@ static int pci_rtl8139_init(PCIDevice *dev) DeviceState *d = DEVICE(dev); uint8_t *pci_conf; - pci_conf = s->dev.config; + pci_conf = dev->config; pci_conf[PCI_INTERRUPT_PIN] = 1; /* interrupt pin A */ /* TODO: start of capability list, but no capability * list bit in status register, and offset 0xdc seems unused. */ @@ -3500,8 +3510,8 @@ static int pci_rtl8139_init(PCIDevice *dev) "rtl8139", 0x100); memory_region_init_io(&s->bar_mem, OBJECT(s), &rtl8139_mmio_ops, s, "rtl8139", 0x100); - pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->bar_io); - pci_register_bar(&s->dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar_mem); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->bar_io); + pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar_mem); qemu_macaddr_default_if_unset(&s->conf.macaddr); -- 2.7.4