From 8811955d0a6d0abfa3e1c0cee30090fda0015069 Mon Sep 17 00:00:00 2001 From: Adam Ford Date: Sat, 2 Jan 2021 05:54:12 -0600 Subject: [PATCH] arm64: dts: renesas: rzg2: Add RPC-IF Support The RZ/G2 series contain the SPI Multi I/O Bus Controller (RPC-IF). Add the nodes, but make them disabled by default. Signed-off-by: Adam Ford Link: https://lore.kernel.org/r/20210102115412.3402059-4-aford173@gmail.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r8a774a1.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/renesas/r8a774b1.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 17 +++++++++++++++++ arch/arm64/boot/dts/renesas/r8a774e1.dtsi | 17 +++++++++++++++++ 4 files changed, 68 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi index 60e1503..d64fb8b 100644 --- a/arch/arm64/boot/dts/renesas/r8a774a1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774a1.dtsi @@ -2317,6 +2317,23 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a774a1-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = ; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A774A1_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; diff --git a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi index 20003a4..5b05474 100644 --- a/arch/arm64/boot/dts/renesas/r8a774b1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774b1.dtsi @@ -2175,6 +2175,23 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a774b1-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = ; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + sata: sata@ee300000 { compatible = "renesas,sata-r8a774b1", "renesas,rcar-gen3-sata"; diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index e0e5434..20fa3ca 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -1654,6 +1654,23 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a774c0-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = ; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; diff --git a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi index 2e6c12a..8eb006c 100644 --- a/arch/arm64/boot/dts/renesas/r8a774e1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774e1.dtsi @@ -2408,6 +2408,23 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a774e1-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = ; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A774E1_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + sata: sata@ee300000 { compatible = "renesas,sata-r8a774e1", "renesas,rcar-gen3-sata"; -- 2.7.4