From 87943377315aebb9dbe539bae0a87829a6c22071 Mon Sep 17 00:00:00 2001 From: bernds Date: Fri, 11 Apr 2008 14:40:55 +0000 Subject: [PATCH] * config/bfin/constraints.md: New file. * config/bfin/bfin.md: Include it. (adddi3): Use satisfies_constraint functions instead of the old macros. * config/bfin/bfin.h (REG_CLASS_FROM_LETTER, CONSTRAINT_LEN, CONST_18UBIT_IMM_P, CONST_16BIT_IMM_P, CONST_16UBIT_IMM_P, CONST_7BIT_IMM_P, CONST_7NBIT_IMM_P, CONST_5UBIT_IMM_P, CONST_4BIT_IMM_P, CONST_4UBIT_IMM_P, CONST_3BIT_IMM_P, CONST_3UBIT_IMM_P, CONST_OK_FOR_K, CONST_OK_FOR_P, CONST_OK_FOR_M, CONST_OK_FOR_CONSTRAINT_P, CONST_DOUBLE_OK_FOR_LETTER, EXTRA_CONSTRAINT): Delete. * config/bfin/predicates.md (highbits_operand, reg_or_7bit_operand, reg_or_neg7bit_operand): Use satisfies_constraint functions instead of the old macros. * config/bfin/bfin.c: Include "tm-constrs.h". (bfin_secondary_reload, split_load_immediate, bfin_rtx_costs): Use satisfies_constraint functions instead of the old macros. * doc/md.texi (Blackfin Constraints): Update file name reference. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@134198 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 20 +++++++ gcc/config/bfin/bfin.c | 11 ++-- gcc/config/bfin/bfin.h | 120 ------------------------------------------ gcc/config/bfin/bfin.md | 6 +-- gcc/config/bfin/predicates.md | 6 +-- gcc/doc/md.texi | 2 +- 6 files changed, 33 insertions(+), 132 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1c50391..06eefcc 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,23 @@ +2008-04-11 Bernd Schmidt + + * config/bfin/constraints.md: New file. + * config/bfin/bfin.md: Include it. + (adddi3): Use satisfies_constraint functions instead of the old macros. + * config/bfin/bfin.h (REG_CLASS_FROM_LETTER, CONSTRAINT_LEN, + CONST_18UBIT_IMM_P, CONST_16BIT_IMM_P, CONST_16UBIT_IMM_P, + CONST_7BIT_IMM_P, CONST_7NBIT_IMM_P, CONST_5UBIT_IMM_P, + CONST_4BIT_IMM_P, CONST_4UBIT_IMM_P, CONST_3BIT_IMM_P, + CONST_3UBIT_IMM_P, CONST_OK_FOR_K, CONST_OK_FOR_P, CONST_OK_FOR_M, + CONST_OK_FOR_CONSTRAINT_P, CONST_DOUBLE_OK_FOR_LETTER, + EXTRA_CONSTRAINT): Delete. + * config/bfin/predicates.md (highbits_operand, reg_or_7bit_operand, + reg_or_neg7bit_operand): Use satisfies_constraint functions instead + of the old macros. + * config/bfin/bfin.c: Include "tm-constrs.h". + (bfin_secondary_reload, split_load_immediate, bfin_rtx_costs): + Use satisfies_constraint functions instead of the old macros. + * doc/md.texi (Blackfin Constraints): Update file name reference. + 2008-04-11 Richard Guenther PR tree-optimization/35869 diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index cc558d7..d1a5c80 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -49,6 +49,7 @@ #include "langhooks.h" #include "bfin-protos.h" #include "tm-preds.h" +#include "tm-constrs.h" #include "gt-bfin.h" #include "basic-block.h" #include "cfglayout.h" @@ -2286,7 +2287,7 @@ bfin_secondary_reload (bool in_p, rtx x, enum reg_class class, if (fp_plus_const_operand (x, mode)) { rtx op2 = XEXP (x, 1); - int large_constant_p = ! CONST_7BIT_IMM_P (INTVAL (op2)); + int large_constant_p = ! satisfies_constraint_Ks7 (op2); if (class == PREGS || class == PREGS_CLOBBERED) return NO_REGS; @@ -2712,7 +2713,7 @@ split_load_immediate (rtx operands[]) if (D_REGNO_P (regno)) { - if (CONST_7BIT_IMM_P (tmp)) + if (tmp >= -64 && tmp <= 63) { emit_insn (gen_movsi (operands[0], GEN_INT (tmp))); emit_insn (gen_movstricthi_high (operands[0], GEN_INT (val & -65536))); @@ -2739,7 +2740,7 @@ split_load_immediate (rtx operands[]) return 0; if (optimize_size - && num_compl_zero && CONST_7BIT_IMM_P (shifted_compl)) + && num_compl_zero && shifted_compl >= -64 && shifted_compl <= 63) { /* If optimizing for size, generate a sequence that has more instructions but is shorter. */ @@ -2870,7 +2871,7 @@ bfin_rtx_costs (rtx x, int code, int outer_code, int *total) { case CONST_INT: if (outer_code == SET || outer_code == PLUS) - *total = CONST_7BIT_IMM_P (INTVAL (x)) ? 0 : cost2; + *total = satisfies_constraint_Ks7 (x) ? 0 : cost2; else if (outer_code == AND) *total = log2constp (~INTVAL (x)) ? 0 : cost2; else if (outer_code == LE || outer_code == LT || outer_code == EQ) @@ -2928,7 +2929,7 @@ bfin_rtx_costs (rtx x, int code, int outer_code, int *total) { *total = 6 * cost2; if (GET_CODE (op1) != CONST_INT - || !CONST_7BIT_IMM_P (INTVAL (op1))) + || !satisfies_constraint_Ks7 (op1)) *total += rtx_cost (op1, PLUS); if (GET_CODE (op0) != REG && (GET_CODE (op0) != SUBREG || GET_CODE (SUBREG_REG (op0)) != REG)) diff --git a/gcc/config/bfin/bfin.h b/gcc/config/bfin/bfin.h index 33ab81d..3850c62 100644 --- a/gcc/config/bfin/bfin.h +++ b/gcc/config/bfin/bfin.h @@ -677,43 +677,6 @@ enum reg_class #define REGNO_OK_FOR_INDEX_P(X) 0 -/* Get reg_class from a letter such as appears in the machine description. */ - -#define REG_CLASS_FROM_CONSTRAINT(LETTER, STR) \ - ((LETTER) == 'a' ? PREGS : \ - (LETTER) == 'Z' ? FDPIC_REGS : \ - (LETTER) == 'Y' ? FDPIC_FPTR_REGS : \ - (LETTER) == 'd' ? DREGS : \ - (LETTER) == 'z' ? PREGS_CLOBBERED : \ - (LETTER) == 'D' ? EVEN_DREGS : \ - (LETTER) == 'W' ? ODD_DREGS : \ - (LETTER) == 'e' ? AREGS : \ - (LETTER) == 'A' ? EVEN_AREGS : \ - (LETTER) == 'B' ? ODD_AREGS : \ - (LETTER) == 'b' ? IREGS : \ - (LETTER) == 'v' ? BREGS : \ - (LETTER) == 'f' ? MREGS : \ - (LETTER) == 'c' ? CIRCREGS : \ - (LETTER) == 'C' ? CCREGS : \ - (LETTER) == 't' ? LT_REGS : \ - (LETTER) == 'k' ? LC_REGS : \ - (LETTER) == 'u' ? LB_REGS : \ - (LETTER) == 'x' ? MOST_REGS : \ - (LETTER) == 'y' ? PROLOGUE_REGS : \ - (LETTER) == 'w' ? NON_A_CC_REGS : \ - (LETTER) == 'q' \ - ? ((STR)[1] == '0' ? D0REGS \ - : (STR)[1] == '1' ? D1REGS \ - : (STR)[1] == '2' ? D2REGS \ - : (STR)[1] == '3' ? D3REGS \ - : (STR)[1] == '4' ? D4REGS \ - : (STR)[1] == '5' ? D5REGS \ - : (STR)[1] == '6' ? D6REGS \ - : (STR)[1] == '7' ? D7REGS \ - : (STR)[1] == 'A' ? P0REGS \ - : NO_REGS) : \ - NO_REGS) - /* The same information, inverted: Return the class number of the smallest class containing reg number REGNO. This could be a conditional expression @@ -1198,89 +1161,6 @@ do { \ #define WORD_REGISTER_OPERATIONS */ -#define CONST_18UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 262140) -#define CONST_16BIT_IMM_P(VALUE) ((VALUE) >= -32768 && (VALUE) <= 32767) -#define CONST_16UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 65535) -#define CONST_7BIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 63) -#define CONST_7NBIT_IMM_P(VALUE) ((VALUE) >= -64 && (VALUE) <= 0) -#define CONST_5UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 31) -#define CONST_4BIT_IMM_P(VALUE) ((VALUE) >= -8 && (VALUE) <= 7) -#define CONST_4UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 15) -#define CONST_3BIT_IMM_P(VALUE) ((VALUE) >= -4 && (VALUE) <= 3) -#define CONST_3UBIT_IMM_P(VALUE) ((VALUE) >= 0 && (VALUE) <= 7) - -#define CONSTRAINT_LEN(C, STR) \ - ((C) == 'P' || (C) == 'M' || (C) == 'N' || (C) == 'q' ? 2 \ - : (C) == 'K' ? 3 \ - : DEFAULT_CONSTRAINT_LEN ((C), (STR))) - -#define CONST_OK_FOR_P(VALUE, STR) \ - ((STR)[1] == '0' ? (VALUE) == 0 \ - : (STR)[1] == '1' ? (VALUE) == 1 \ - : (STR)[1] == '2' ? (VALUE) == 2 \ - : (STR)[1] == '3' ? (VALUE) == 3 \ - : (STR)[1] == '4' ? (VALUE) == 4 \ - : (STR)[1] == 'A' ? (VALUE) != MACFLAG_M && (VALUE) != MACFLAG_IS_M \ - : (STR)[1] == 'B' ? (VALUE) == MACFLAG_M || (VALUE) == MACFLAG_IS_M \ - : 0) - -#define CONST_OK_FOR_K(VALUE, STR) \ - ((STR)[1] == 'u' \ - ? ((STR)[2] == '3' ? CONST_3UBIT_IMM_P (VALUE) \ - : (STR)[2] == '4' ? CONST_4UBIT_IMM_P (VALUE) \ - : (STR)[2] == '5' ? CONST_5UBIT_IMM_P (VALUE) \ - : (STR)[2] == 'h' ? CONST_16UBIT_IMM_P (VALUE) \ - : 0) \ - : (STR)[1] == 's' \ - ? ((STR)[2] == '3' ? CONST_3BIT_IMM_P (VALUE) \ - : (STR)[2] == '4' ? CONST_4BIT_IMM_P (VALUE) \ - : (STR)[2] == '7' ? CONST_7BIT_IMM_P (VALUE) \ - : (STR)[2] == 'h' ? CONST_16BIT_IMM_P (VALUE) \ - : 0) \ - : (STR)[1] == 'n' \ - ? ((STR)[2] == '7' ? CONST_7NBIT_IMM_P (VALUE) \ - : 0) \ - : (STR)[1] == 'N' \ - ? ((STR)[2] == '7' ? CONST_7BIT_IMM_P (-(VALUE)) \ - : 0) \ - : 0) - -#define CONST_OK_FOR_M(VALUE, STR) \ - ((STR)[1] == '1' ? (VALUE) == 255 \ - : (STR)[1] == '2' ? (VALUE) == 65535 \ - : 0) - -/* The letters I, J, K, L and M in a register constraint string - can be used to stand for particular ranges of immediate operands. - This macro defines what the ranges are. - C is the letter, and VALUE is a constant value. - Return 1 if VALUE is in the range specified by C. - - bfin constant operands are as follows - - J 2**N 5bit imm scaled - Ks7 -64 .. 63 signed 7bit imm - Ku5 0..31 unsigned 5bit imm - Ks4 -8 .. 7 signed 4bit imm - Ks3 -4 .. 3 signed 3bit imm - Ku3 0 .. 7 unsigned 3bit imm - Pn 0, 1, 2 constants 0, 1 or 2, corresponding to n -*/ -#define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \ - ((C) == 'J' ? (log2constp (VALUE)) \ - : (C) == 'K' ? CONST_OK_FOR_K (VALUE, STR) \ - : (C) == 'L' ? log2constp (~(VALUE)) \ - : (C) == 'M' ? CONST_OK_FOR_M (VALUE, STR) \ - : (C) == 'P' ? CONST_OK_FOR_P (VALUE, STR) \ - : 0) - - /*Constant Output Formats */ -#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ - ((C) == 'H' ? 1 : 0) - -#define EXTRA_CONSTRAINT(VALUE, D) \ - ((D) == 'Q' ? GET_CODE (VALUE) == SYMBOL_REF : 0) - /* Evaluates to true if A and B are mac flags that can be used together in a single multiply insn. That is the case if they are both the same flag not involving M, or if one is a combination of diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md index 2a4631d..f535799 100644 --- a/gcc/config/bfin/bfin.md +++ b/gcc/config/bfin/bfin.md @@ -258,7 +258,7 @@ ;; Operand and operator predicates (include "predicates.md") - +(include "constraints.md") ;;; FRIO branches have been optimized for code density ;;; this comes at a slight cost of complexity when @@ -1018,7 +1018,7 @@ xops[7] = gen_rtx_REG (BImode, REG_CC); if (!register_operand (xops[4], SImode) && (GET_CODE (xops[4]) != CONST_INT - || !CONST_OK_FOR_K (INTVAL (xops[4]), "Ks7"))) + || !satisfies_constraint_Ks7 (xops[4]))) xops[4] = force_reg (SImode, xops[4]); if (!reg_overlap_mentioned_p (operands[0], operands[1]) && !reg_overlap_mentioned_p (operands[0], operands[2])) @@ -1027,7 +1027,7 @@ emit_insn (gen_movbisi (xops[6], xops[7])); if (!register_operand (xops[5], SImode) && (GET_CODE (xops[5]) != CONST_INT - || !CONST_OK_FOR_K (INTVAL (xops[5]), "Ks7"))) + || !satisfies_constraint_Ks7 (xops[5]))) xops[5] = force_reg (SImode, xops[5]); if (xops[5] != const0_rtx) emit_insn (gen_addsi3 (xops[1], xops[3], xops[5])); diff --git a/gcc/config/bfin/predicates.md b/gcc/config/bfin/predicates.md index ec26133..23ca2e4 100644 --- a/gcc/config/bfin/predicates.md +++ b/gcc/config/bfin/predicates.md @@ -34,7 +34,7 @@ ;; if the constant would be cheap to load. (define_predicate "highbits_operand" (and (match_code "const_int") - (match_test "log2constp (-INTVAL (op)) && !CONST_7BIT_IMM_P (INTVAL (op))"))) + (match_test "log2constp (-INTVAL (op)) && !satisfies_constraint_Ks7 (op)"))) ;; Return nonzero if OP is suitable as a right-hand side operand for an ;; andsi3 operation. @@ -99,7 +99,7 @@ (define_predicate "reg_or_7bit_operand" (ior (match_operand 0 "register_operand") (and (match_code "const_int") - (match_test "CONST_7BIT_IMM_P (INTVAL (op))")))) + (match_test "satisfies_constraint_Ks7 (op)")))) ;; Return nonzero if OP is a register other than DREG and PREG. (define_predicate "nondp_register_operand" @@ -123,7 +123,7 @@ (define_predicate "reg_or_neg7bit_operand" (ior (match_operand 0 "register_operand") (and (match_code "const_int") - (match_test "CONST_7BIT_IMM_P (-INTVAL (op))")))) + (match_test "satisfies_constraint_KN7 (op)")))) ;; Used for secondary reloads, this function returns 1 if OP is of the ;; form (plus (fp) (const_int)). diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi index bd4150f..a4117a3 100644 --- a/gcc/doc/md.texi +++ b/gcc/doc/md.texi @@ -2239,7 +2239,7 @@ range of 1 to 2047. @end table -@item Blackfin family---@file{config/bfin/bfin.h} +@item Blackfin family---@file{config/bfin/constraints.md} @table @code @item a P register -- 2.7.4