From 872eb918d8e10a6293240e0dd89a45842079c03c Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Sun, 19 Feb 2023 15:22:50 +0100 Subject: [PATCH] dt-bindings: serial: imx: Document mandatory clock properties The UART IP must be connected to clock, document the properties in DT bindings. Update example to match Linux arch/arm/boot/dts/imx51.dtsi . Signed-off-by: Marek Vasut Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230219142250.10176-2-marex@denx.de Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/fsl-imx-uart.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml index c22aab8..4041424 100644 --- a/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml +++ b/Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml @@ -49,6 +49,14 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 2 + + clock-names: + items: + - const: ipg + - const: per + dmas: items: - description: DMA controller phandle and request line for RX @@ -96,12 +104,16 @@ properties: required: - compatible - reg + - clocks + - clock-names - interrupts unevaluatedProperties: false examples: - | + #include + aliases { serial0 = &uart1; }; @@ -110,6 +122,9 @@ examples: compatible = "fsl,imx51-uart", "fsl,imx21-uart"; reg = <0x73fbc000 0x4000>; interrupts = <31>; + clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, + <&clks IMX5_CLK_UART1_PER_GATE>; + clock-names = "ipg", "per"; dmas = <&sdma 18 4 1>, <&sdma 19 4 2>; dma-names = "rx", "tx"; uart-has-rtscts; -- 2.7.4