From 868b3a333ba6d7a4d6e696d1322f14bdce7c23cc Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Wed, 24 Oct 2012 02:10:54 +0000 Subject: [PATCH] [mips] Make sure sret argument is returned in register V0. llvm-svn: 166539 --- llvm/lib/Target/Mips/MipsISelLowering.cpp | 5 +++-- llvm/test/CodeGen/Mips/mips64-sret.ll | 4 +++- 2 files changed, 6 insertions(+), 3 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 5cc9662..91bb037 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -3539,10 +3539,11 @@ MipsTargetLowering::LowerReturn(SDValue Chain, if (!Reg) llvm_unreachable("sret virtual register not created in the entry block"); SDValue Val = DAG.getCopyFromReg(Chain, dl, Reg, getPointerTy()); + unsigned V0 = IsN64 ? Mips::V0_64 : Mips::V0; - Chain = DAG.getCopyToReg(Chain, dl, IsN64 ? Mips::V0_64 : Mips::V0, Val, - Flag); + Chain = DAG.getCopyToReg(Chain, dl, V0, Val, Flag); Flag = Chain.getValue(1); + MF.getRegInfo().addLiveOut(V0); } // Return on Mips is always a "jr $ra" diff --git a/llvm/test/CodeGen/Mips/mips64-sret.ll b/llvm/test/CodeGen/Mips/mips64-sret.ll index 498c5fe..e26b022 100644 --- a/llvm/test/CodeGen/Mips/mips64-sret.ll +++ b/llvm/test/CodeGen/Mips/mips64-sret.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -O0 < %s +; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=n64 -O3 < %s | FileCheck %s %struct.S = type { [8 x i32] } @@ -6,6 +6,8 @@ define void @f(%struct.S* noalias sret %agg.result) nounwind { entry: +; CHECK: daddu $2, $zero, $4 + %0 = bitcast %struct.S* %agg.result to i8* call void @llvm.memcpy.p0i8.p0i8.i64(i8* %0, i8* bitcast (%struct.S* @g to i8*), i64 32, i32 4, i1 false) ret void -- 2.7.4