From 868034479d5a8180f40488b8702f5ff4c97bbbac Mon Sep 17 00:00:00 2001 From: Alexander Soldatov Date: Tue, 18 Apr 2017 17:51:20 +0300 Subject: [PATCH] [RyuJIT/ARM32] Use 'subs' instead of 'sub' on localloc Previous implementation used sub instruction for counter conditional execution for iterating over loops which cause incorrect behavior. Commit migrated from https://github.com/dotnet/coreclr/commit/9c074374adc1858d18690a6547c015917793d195 --- src/coreclr/src/jit/codegenarm.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/coreclr/src/jit/codegenarm.cpp b/src/coreclr/src/jit/codegenarm.cpp index 4507a5c..bac24d5 100644 --- a/src/coreclr/src/jit/codegenarm.cpp +++ b/src/coreclr/src/jit/codegenarm.cpp @@ -1267,7 +1267,7 @@ void CodeGen::genLclHeap(GenTreePtr tree) // If not done, loop // Note that regCnt is the number of bytes to stack allocate. assert(genIsValidIntReg(regCnt)); - getEmitter()->emitIns_R_R_I(INS_sub, EA_PTRSIZE, regCnt, regCnt, STACK_ALIGN); + getEmitter()->emitIns_R_I(INS_sub, EA_PTRSIZE, regCnt, STACK_ALIGN, INS_FLAGS_SET); emitJumpKind jmpNotEqual = genJumpKindForOper(GT_NE, CK_SIGNED); inst_JMP(jmpNotEqual, loop); } @@ -1311,7 +1311,7 @@ void CodeGen::genLclHeap(GenTreePtr tree) BasicBlock* done = genCreateTempLabel(); // subs regCnt, SP, regCnt // regCnt now holds ultimate SP - getEmitter()->emitIns_R_R_R(INS_sub, EA_PTRSIZE, regCnt, REG_SPBASE, regCnt); + getEmitter()->emitIns_R_R_R(INS_sub, EA_PTRSIZE, regCnt, REG_SPBASE, regCnt, INS_FLAGS_SET); inst_JMP(EJ_vc, loop); // branch if the V flag is not set -- 2.7.4