From 856772017f60d5cbcb6f08a48a5535eb64005a54 Mon Sep 17 00:00:00 2001 From: Thomas Monjalon Date: Thu, 15 Oct 2009 19:01:19 +0200 Subject: [PATCH] target-ppc: better support of e300 CPU core MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Declare HID2 register. Use high BATs for e300 (8 instead of 4). Fix index of high BATs registers. Before the fix, IBAT4-7 were overwriting IBAT0-3. Signed-off-by: François Armand Signed-off-by: Aurelien Jarno --- target-ppc/translate_init.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 79d3b4c..910b4d9 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -233,7 +233,7 @@ static void spr_write_ibatu (void *opaque, int sprn, int gprn) static void spr_write_ibatu_h (void *opaque, int sprn, int gprn) { - TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT4U) / 2); + TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_IBAT4U) / 2) + 4); gen_helper_store_ibatu(t0, cpu_gpr[gprn]); tcg_temp_free_i32(t0); } @@ -247,7 +247,7 @@ static void spr_write_ibatl (void *opaque, int sprn, int gprn) static void spr_write_ibatl_h (void *opaque, int sprn, int gprn) { - TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT4L) / 2); + TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_IBAT4L) / 2) + 4); gen_helper_store_ibatl(t0, cpu_gpr[gprn]); tcg_temp_free_i32(t0); } @@ -4166,8 +4166,14 @@ static void init_proc_e300 (CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); + /* XXX : not implemented */ + spr_register(env, SPR_HID2, "HID2", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); /* Memory management */ gen_low_BATs(env); + gen_high_BATs(env); gen_6xx_7xx_soft_tlb(env, 64, 2); init_excp_603(env); env->dcache_line_size = 32; -- 2.7.4