From 8555ab2fcdfad1f9869ccaa784b38dfa59fc17f1 Mon Sep 17 00:00:00 2001 From: Nikita Popov Date: Wed, 22 Feb 2023 08:56:19 +0100 Subject: [PATCH] Revert "[NFC] Make FPClassTest a bitmask enumeration" MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit This reverts commit 2e416cdd52c1079b8c7cb1f7d7e557c889a4fb56. Breaks the GCC build: In file included from /home/npopov/repos/llvm-project/llvm/include/llvm/ADT/FloatingPointMode.h:18, from /home/npopov/repos/llvm-project/llvm/include/llvm/ADT/APFloat.h:20, from /home/npopov/repos/llvm-project/llvm/lib/Support/APFloat.cpp:14: /home/npopov/repos/llvm-project/llvm/include/llvm/ADT/BitmaskEnum.h:66:22: error: extra qualification not allowed [-fpermissive] 66 | template <> struct llvm::is_bitmask_enum : std::true_type {}; \ | ^~~~ /home/npopov/repos/llvm-project/llvm/include/llvm/ADT/FloatingPointMode.h:223:1: note: in expansion of macro ‘LLVM_DECLARE_ENUM_AS_BITMASK’ 223 | LLVM_DECLARE_ENUM_AS_BITMASK(FPClassTest, /* LargestValue */ fcPosInf); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ /home/npopov/repos/llvm-project/llvm/include/llvm/ADT/BitmaskEnum.h:67:22: error: extra qualification not allowed [-fpermissive] 67 | template <> struct llvm::largest_bitmask_enum_bit { \ | ^~~~ /home/npopov/repos/llvm-project/llvm/include/llvm/ADT/FloatingPointMode.h:223:1: note: in expansion of macro ‘LLVM_DECLARE_ENUM_AS_BITMASK’ 223 | LLVM_DECLARE_ENUM_AS_BITMASK(FPClassTest, /* LargestValue */ fcPosInf); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ [43/4396] Building CXX object lib/Supp...iles/LLVMSupport.dir/CommandLine.cpp.o --- llvm/include/llvm/ADT/FloatingPointMode.h | 13 ++++--------- llvm/include/llvm/CodeGen/CodeGenCommonISel.h | 4 +--- llvm/include/llvm/CodeGen/TargetLowering.h | 2 +- llvm/lib/CodeGen/CodeGenCommonISel.cpp | 6 +++--- llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 3 +-- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 ++-- llvm/lib/IR/Verifier.cpp | 2 +- 7 files changed, 13 insertions(+), 21 deletions(-) diff --git a/llvm/include/llvm/ADT/FloatingPointMode.h b/llvm/include/llvm/ADT/FloatingPointMode.h index a99f4f1..07f2739 100644 --- a/llvm/include/llvm/ADT/FloatingPointMode.h +++ b/llvm/include/llvm/ADT/FloatingPointMode.h @@ -15,7 +15,6 @@ #ifndef LLVM_ADT_FLOATINGPOINTMODE_H #define LLVM_ADT_FLOATINGPOINTMODE_H -#include "llvm/ADT/BitmaskEnum.h" #include "llvm/ADT/StringSwitch.h" #include "llvm/Support/raw_ostream.h" @@ -193,11 +192,11 @@ void DenormalMode::print(raw_ostream &OS) const { OS << denormalModeKindName(Output) << ',' << denormalModeKindName(Input); } +} // namespace llvm + /// Floating-point class tests, supported by 'is_fpclass' intrinsic. Actual /// test may be an OR combination of basic tests. -enum FPClassTest : unsigned { - fcNone = 0, - +enum FPClassTest { fcSNan = 0x0001, fcQNan = 0x0002, fcNegInf = 0x0004, @@ -217,11 +216,7 @@ enum FPClassTest : unsigned { fcPosFinite = fcPosNormal | fcPosSubnormal | fcPosZero, fcNegFinite = fcNegNormal | fcNegSubnormal | fcNegZero, fcFinite = fcPosFinite | fcNegFinite, - fcAllFlags = fcNan | fcInf | fcFinite, + fcAllFlags = fcNan | fcInf | fcFinite }; -LLVM_DECLARE_ENUM_AS_BITMASK(FPClassTest, /* LargestValue */ fcPosInf); - -} // namespace llvm - #endif // LLVM_ADT_FLOATINGPOINTMODE_H diff --git a/llvm/include/llvm/CodeGen/CodeGenCommonISel.h b/llvm/include/llvm/CodeGen/CodeGenCommonISel.h index d08ddbf..3b11c84 100644 --- a/llvm/include/llvm/CodeGen/CodeGenCommonISel.h +++ b/llvm/include/llvm/CodeGen/CodeGenCommonISel.h @@ -19,8 +19,6 @@ namespace llvm { class BasicBlock; -enum FPClassTest : unsigned; - /// Encapsulates all of the information needed to generate a stack protector /// check, and signals to isel when initialized that one needs to be generated. /// @@ -220,7 +218,7 @@ findSplitPointForStackProtector(MachineBasicBlock *BB, /// \param Test The test as specified in 'is_fpclass' intrinsic invocation. /// \returns The inverted test, or zero, if inversion does not produce simpler /// test. -FPClassTest getInvertedFPClassTest(FPClassTest Test); +unsigned getInvertedFPClassTest(unsigned Test); /// Assuming the instruction \p MI is going to be deleted, attempt to salvage /// debug users of \p MI by writing the effect of \p MI in a DIExpression. diff --git a/llvm/include/llvm/CodeGen/TargetLowering.h b/llvm/include/llvm/CodeGen/TargetLowering.h index ea47153..e302ab9 100644 --- a/llvm/include/llvm/CodeGen/TargetLowering.h +++ b/llvm/include/llvm/CodeGen/TargetLowering.h @@ -4956,7 +4956,7 @@ public: /// \param Test The test to perform. /// \param Flags The optimization flags. /// \returns The expansion result or SDValue() if it fails. - SDValue expandIS_FPCLASS(EVT ResultVT, SDValue Op, FPClassTest Test, + SDValue expandIS_FPCLASS(EVT ResultVT, SDValue Op, unsigned Test, SDNodeFlags Flags, const SDLoc &DL, SelectionDAG &DAG) const; diff --git a/llvm/lib/CodeGen/CodeGenCommonISel.cpp b/llvm/lib/CodeGen/CodeGenCommonISel.cpp index 2b653f0..a521596 100644 --- a/llvm/lib/CodeGen/CodeGenCommonISel.cpp +++ b/llvm/lib/CodeGen/CodeGenCommonISel.cpp @@ -173,8 +173,8 @@ llvm::findSplitPointForStackProtector(MachineBasicBlock *BB, return SplitPoint; } -FPClassTest llvm::getInvertedFPClassTest(FPClassTest Test) { - FPClassTest InvertedTest = ~Test & fcAllFlags; +unsigned llvm::getInvertedFPClassTest(unsigned Test) { + unsigned InvertedTest = ~Test & fcAllFlags; switch (InvertedTest) { default: break; @@ -198,7 +198,7 @@ FPClassTest llvm::getInvertedFPClassTest(FPClassTest Test) { case fcNegFinite: return InvertedTest; } - return fcNone; + return 0; } static MachineOperand *getSalvageOpsForCopy(const MachineRegisterInfo &MRI, diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 0d4e8ca4..650bb536 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -6510,8 +6510,7 @@ void SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, const DataLayout DLayout = DAG.getDataLayout(); EVT DestVT = TLI.getValueType(DLayout, I.getType()); EVT ArgVT = TLI.getValueType(DLayout, I.getArgOperand(0)->getType()); - FPClassTest Test = static_cast( - cast(I.getArgOperand(1))->getZExtValue()); + unsigned Test = cast(I.getArgOperand(1))->getZExtValue(); MachineFunction &MF = DAG.getMachineFunction(); const Function &F = MF.getFunction(); SDValue Op = getValue(I.getArgOperand(0)); diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 49b1270..4096a95 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -8004,7 +8004,7 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode *Node, } SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op, - FPClassTest Test, SDNodeFlags Flags, + unsigned Test, SDNodeFlags Flags, const SDLoc &DL, SelectionDAG &DAG) const { EVT OperandVT = Op.getValueType(); @@ -8027,7 +8027,7 @@ SDValue TargetLowering::expandIS_FPCLASS(EVT ResultVT, SDValue Op, // Some checks may be represented as inversion of simpler check, for example // "inf|normal|subnormal|zero" => !"nan". bool IsInverted = false; - if (FPClassTest InvertedCheck = getInvertedFPClassTest(Test)) { + if (unsigned InvertedCheck = getInvertedFPClassTest(Test)) { IsInverted = true; Test = InvertedCheck; } diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index 877c7d4..97ab9d2 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -5070,7 +5070,7 @@ void Verifier::visitIntrinsicCall(Intrinsic::ID ID, CallBase &Call) { } case Intrinsic::is_fpclass: { const ConstantInt *TestMask = cast(Call.getOperand(1)); - Check((TestMask->getZExtValue() & ~static_cast(fcAllFlags)) == 0, + Check((TestMask->getZExtValue() & ~fcAllFlags) == 0, "unsupported bits for llvm.is.fpclass test mask"); break; } -- 2.7.4