From 834b21f5e902b4fdf3217779d10d4f388b667e85 Mon Sep 17 00:00:00 2001 From: Ben Skeggs Date: Thu, 14 Apr 2016 10:50:55 +1000 Subject: [PATCH] drm/nouveau/fb/gk20a,gm20b: setup mmu debug buffer registers at init() Signed-off-by: Ben Skeggs --- drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c | 5 ----- drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c | 4 ++++ 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c index a405093..62f40b9 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gk20a.c @@ -22,7 +22,6 @@ #include "gf100.h" #include "ctxgf100.h" -#include #include #include @@ -220,7 +219,6 @@ int gk20a_gr_init(struct gf100_gr *gr) { struct nvkm_device *device = gr->base.engine.subdev.device; - struct nvkm_fb *fb = device->fb; const u32 magicgpc918 = DIV_ROUND_UP(0x00800000, gr->tpc_total); u32 data[TPC_MAX / 8] = {}; u8 tpcnr[GPC_MAX]; @@ -241,9 +239,6 @@ gk20a_gr_init(struct gf100_gr *gr) return ret; /* MMU debug buffer */ - nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8); - nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8); - if (gr->func->init_gpc_mmu) gr->func->init_gpc_mmu(gr); diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c index 6102e29..7306f7d 100644 --- a/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/fb/gk20a.c @@ -21,11 +21,15 @@ */ #include "priv.h" +#include + static void gk20a_fb_init(struct nvkm_fb *fb) { struct nvkm_device *device = fb->subdev.device; nvkm_mask(device, 0x100c80, 0x00000001, 0x00000000); /* 128KiB lpg */ + nvkm_wr32(device, 0x100cc8, nvkm_memory_addr(fb->mmu_wr) >> 8); + nvkm_wr32(device, 0x100ccc, nvkm_memory_addr(fb->mmu_rd) >> 8); } static const struct nvkm_fb_func -- 2.7.4