From 82af745d2f934b03dd430419b7c33808ebc1d4f7 Mon Sep 17 00:00:00 2001 From: Andy Shevchenko Date: Tue, 23 Jul 2019 18:56:27 +0300 Subject: [PATCH] pinctrl: cannonlake: Provide Interrupt Status register offset Since some of the GPIO controllers use different Interrupt Status offset, it make sense to provide it explicitly in the driver. Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/pinctrl/intel/pinctrl-cannonlake.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c index 08024b0..f51b27b 100644 --- a/drivers/pinctrl/intel/pinctrl-cannonlake.c +++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c @@ -19,6 +19,7 @@ #define CNL_PADCFGLOCK 0x080 #define CNL_LP_HOSTSW_OWN 0x0b0 #define CNL_H_HOSTSW_OWN 0x0c0 +#define CNL_GPI_IS 0x100 #define CNL_GPI_IE 0x120 #define CNL_GPP(r, s, e, g) \ @@ -37,6 +38,7 @@ .padown_offset = CNL_PAD_OWN, \ .padcfglock_offset = CNL_PADCFGLOCK, \ .hostown_offset = (o), \ + .is_offset = CNL_GPI_IS, \ .ie_offset = CNL_GPI_IE, \ .pin_base = (s), \ .npins = ((e) - (s) + 1), \ -- 2.7.4