From 82920c99a596383a6fff0d74e237afc4c72cbf03 Mon Sep 17 00:00:00 2001
From: Georg Lehmann <dadschoorse@gmail.com>
Date: Tue, 1 Aug 2023 10:21:50 +0200
Subject: [PATCH] aco: fix non constant 16bit bitnz/bitz

Fixes: 573e98f34ac ("aco: implement nir_op_bitz/bitnz")
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24420>
---
 src/amd/compiler/aco_instruction_selection.cpp | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp
index 382b92a..838f6a4 100644
--- a/src/amd/compiler/aco_instruction_selection.cpp
+++ b/src/amd/compiler/aco_instruction_selection.cpp
@@ -3790,7 +3790,7 @@ visit_alu_instr(isel_context* ctx, nir_alu_instr* instr)
          else
             res = bld.vop3(aco_opcode::v_lshlrev_b16_e64, bld.def(v2b), src1, Operand::c32(1));
 
-         res = bld.vop2(aco_opcode::v_and_b32, bld.def(v2b), src0, src1);
+         res = bld.vop2(aco_opcode::v_and_b32, bld.def(v2b), src0, res);
       } else if (instr->src[0].src.ssa->bit_size == 32) {
          res = bld.vop3(aco_opcode::v_bfe_u32, bld.def(v1), src0, src1, Operand::c32(1));
       } else if (instr->src[0].src.ssa->bit_size == 64) {
-- 
2.7.4