From 8288d39b4cce67a3947204aa955df082ad0e76fc Mon Sep 17 00:00:00 2001 From: Luke Lau Date: Tue, 2 May 2023 14:08:17 +0100 Subject: [PATCH] [RISCV] Add test for unprofitable SLP vectorization Reviewed By: ABataev Differential Revision: https://reviews.llvm.org/D149653 --- .../Transforms/SLPVectorizer/RISCV/struct-gep.ll | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 llvm/test/Transforms/SLPVectorizer/RISCV/struct-gep.ll diff --git a/llvm/test/Transforms/SLPVectorizer/RISCV/struct-gep.ll b/llvm/test/Transforms/SLPVectorizer/RISCV/struct-gep.ll new file mode 100644 index 0000000..1f6a28e --- /dev/null +++ b/llvm/test/Transforms/SLPVectorizer/RISCV/struct-gep.ll @@ -0,0 +1,23 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -passes=slp-vectorizer -mtriple=riscv64 -mattr=+v \ +; RUN: -riscv-v-slp-max-vf=0 -S | FileCheck %s + +; FIXME: This should not be vectorized + +%struct.2i32 = type { i32, i32 } + +define void @splat_store_v2i32(ptr %dest, i64 %i) { +; CHECK-LABEL: @splat_store_v2i32( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[P1:%.*]] = getelementptr [[STRUCT_2I32:%.*]], ptr [[DEST:%.*]], i64 [[I:%.*]], i32 0 +; CHECK-NEXT: store <2 x i32> , ptr [[P1]], align 4 +; CHECK-NEXT: ret void +; +entry: + %p1 = getelementptr %struct.2i32, ptr %dest, i64 %i, i32 0 + store i32 1, ptr %p1 + %p2 = getelementptr %struct.2i32, ptr %dest, i64 %i, i32 1 + store i32 1, ptr %p2 + ret void +} + -- 2.7.4