From 82662b753dbf49b16d2c91b5c15c5cc8bcd78c45 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Thu, 7 Apr 2022 09:05:51 -0700 Subject: [PATCH] [RISCV] Add swapped patterns to VPatIntegerSetCCVL_VIPlus1. This matches VPatIntegerSetCCVL_VI_Swappable. But as noted in the FIXME this may only be needed due to lack of canonicalization on VP_SETCC. Reviewed By: rogfer01 Differential Revision: https://reviews.llvm.org/D123239 --- llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td | 25 ++++++--- .../RISCV/rvv/fixed-vectors-setcc-int-vp.ll | 30 ++++------- llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll | 60 +++++++--------------- 3 files changed, 46 insertions(+), 69 deletions(-) diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td index 7367140..487bb43 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td @@ -502,6 +502,8 @@ multiclass VPatIntegerSetCCVL_VI_Swappable; + + // FIXME: Can do some canonicalization to remove these patterns. def : Pat<(vti.Mask (riscv_setcc_vl (SplatPat_simm5 simm5:$rs2), (vti.Vector vti.RegClass:$rs1), invcc, (vti.Mask V0), @@ -511,8 +513,10 @@ multiclass VPatIntegerSetCCVL_VI_Swappable; } -multiclass VPatIntegerSetCCVL_VIPlus1 { +multiclass VPatIntegerSetCCVL_VIPlus1_Swappable { defvar instruction_masked = !cast(instruction_name#"_VI_"#vti.LMul.MX#"_MASK"); def : Pat<(vti.Mask (riscv_setcc_vl (vti.Vector vti.RegClass:$rs1), (splatpat_kind simm5:$rs2), cc, @@ -521,6 +525,15 @@ multiclass VPatIntegerSetCCVL_VIPlus1; + + // FIXME: Can do some canonicalization to remove these patterns. + def : Pat<(vti.Mask (riscv_setcc_vl (splatpat_kind simm5:$rs2), + (vti.Vector vti.RegClass:$rs1), invcc, + (vti.Mask V0), + VLOpFrag)), + (instruction_masked (vti.Mask (IMPLICIT_DEF)), vti.RegClass:$rs1, + (DecImm simm5:$rs2), (vti.Mask V0), GPR:$vl, + vti.Log2SEW)>; } multiclass VPatFPSetCCVL_VV_VF_FV; defm : VPatIntegerSetCCVL_VI_Swappable; - defm : VPatIntegerSetCCVL_VIPlus1; - defm : VPatIntegerSetCCVL_VIPlus1; - defm : VPatIntegerSetCCVL_VIPlus1; - defm : VPatIntegerSetCCVL_VIPlus1; } // foreach vti = AllIntegerVectors diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll index 6ac1e19..fcd2331 100644 --- a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll +++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll @@ -174,9 +174,8 @@ define <8 x i1> @icmp_ugt_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) { define <8 x i1> @icmp_ugt_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_v8i8: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma -; CHECK-NEXT: vmsltu.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement <8 x i8> poison, i8 4, i32 0 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer @@ -351,9 +350,8 @@ define <8 x i1> @icmp_sgt_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) { define <8 x i1> @icmp_sgt_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_v8i8: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma -; CHECK-NEXT: vmslt.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement <8 x i8> poison, i8 4, i32 0 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer @@ -530,10 +528,8 @@ define <8 x i1> @icmp_sle_vi_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) { define <8 x i1> @icmp_sle_vi_swap_v8i8(<8 x i8> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_v8i8: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, mu -; CHECK-NEXT: vmv.v.i v9, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, mf2, ta, ma -; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t +; CHECK-NEXT: vmsgt.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement <8 x i8> poison, i8 4, i32 0 %vb = shufflevector <8 x i8> %elt.head, <8 x i8> poison, <8 x i32> zeroinitializer @@ -722,9 +718,8 @@ define <8 x i1> @icmp_ugt_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) define <8 x i1> @icmp_ugt_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_v8i32: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma -; CHECK-NEXT: vmsltu.vx v10, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v10, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v10 ; CHECK-NEXT: ret %elt.head = insertelement <8 x i32> poison, i32 4, i32 0 @@ -914,9 +909,8 @@ define <8 x i1> @icmp_sgt_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) define <8 x i1> @icmp_sgt_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_v8i32: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma -; CHECK-NEXT: vmslt.vx v10, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v10, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v10 ; CHECK-NEXT: ret %elt.head = insertelement <8 x i32> poison, i32 4, i32 0 @@ -1108,10 +1102,8 @@ define <8 x i1> @icmp_sle_vi_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) define <8 x i1> @icmp_sle_vi_swap_v8i32(<8 x i32> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_v8i32: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, mu -; CHECK-NEXT: vmv.v.i v12, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, m2, ta, ma -; CHECK-NEXT: vmsle.vv v10, v12, v8, v0.t +; CHECK-NEXT: vmsgt.vi v10, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v10 ; CHECK-NEXT: ret %elt.head = insertelement <8 x i32> poison, i32 4, i32 0 @@ -1391,9 +1383,8 @@ define <8 x i1> @icmp_ugt_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) define <8 x i1> @icmp_ugt_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_v8i64: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma -; CHECK-NEXT: vmsltu.vx v12, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v12, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v12 ; CHECK-NEXT: ret %elt.head = insertelement <8 x i64> poison, i64 4, i32 0 @@ -1673,9 +1664,8 @@ define <8 x i1> @icmp_sgt_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) define <8 x i1> @icmp_sgt_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_v8i64: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma -; CHECK-NEXT: vmslt.vx v12, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v12, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v12 ; CHECK-NEXT: ret %elt.head = insertelement <8 x i64> poison, i64 4, i32 0 @@ -1957,10 +1947,8 @@ define <8 x i1> @icmp_sle_vi_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) define <8 x i1> @icmp_sle_vi_swap_v8i64(<8 x i64> %va, <8 x i1> %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_v8i64: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetivli zero, 8, e64, m4, ta, mu -; CHECK-NEXT: vmv.v.i v16, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m4, ta, ma -; CHECK-NEXT: vmsle.vv v12, v16, v8, v0.t +; CHECK-NEXT: vmsgt.vi v12, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v12 ; CHECK-NEXT: ret %elt.head = insertelement <8 x i64> poison, i64 4, i32 0 diff --git a/llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll b/llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll index fa4177a..3280931 100644 --- a/llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll +++ b/llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll @@ -174,9 +174,8 @@ define @icmp_ugt_vi_nxv1i8( %va, @icmp_ugt_vi_swap_nxv1i8( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i8: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma -; CHECK-NEXT: vmsltu.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -351,9 +350,8 @@ define @icmp_sgt_vi_nxv1i8( %va, @icmp_sgt_vi_swap_nxv1i8( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i8: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma -; CHECK-NEXT: vmslt.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -530,10 +528,8 @@ define @icmp_sle_vi_nxv1i8( %va, @icmp_sle_vi_swap_nxv1i8( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_nxv1i8: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetvli a1, zero, e8, mf8, ta, mu -; CHECK-NEXT: vmv.v.i v9, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, mf8, ta, ma -; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t +; CHECK-NEXT: vmsgt.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -708,9 +704,8 @@ define @icmp_ugt_vi_nxv8i8( %va, @icmp_ugt_vi_swap_nxv8i8( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i8: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma -; CHECK-NEXT: vmsltu.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -885,9 +880,8 @@ define @icmp_sgt_vi_nxv8i8( %va, @icmp_sgt_vi_swap_nxv8i8( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i8: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma -; CHECK-NEXT: vmslt.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -1064,10 +1058,8 @@ define @icmp_sle_vi_nxv8i8( %va, @icmp_sle_vi_swap_nxv8i8( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_nxv8i8: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetvli a1, zero, e8, m1, ta, mu -; CHECK-NEXT: vmv.v.i v9, 4 ; CHECK-NEXT: vsetvli zero, a0, e8, m1, ta, ma -; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t +; CHECK-NEXT: vmsgt.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i8 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -1242,9 +1234,8 @@ define @icmp_ugt_vi_nxv1i32( %va, @icmp_ugt_vi_swap_nxv1i32( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i32: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma -; CHECK-NEXT: vmsltu.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -1419,9 +1410,8 @@ define @icmp_sgt_vi_nxv1i32( %va, @icmp_sgt_vi_swap_nxv1i32( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i32: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma -; CHECK-NEXT: vmslt.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -1598,10 +1588,8 @@ define @icmp_sle_vi_nxv1i32( %va, @icmp_sle_vi_swap_nxv1i32( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_nxv1i32: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetvli a1, zero, e32, mf2, ta, mu -; CHECK-NEXT: vmv.v.i v9, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, mf2, ta, ma -; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t +; CHECK-NEXT: vmsgt.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -1790,9 +1778,8 @@ define @icmp_ugt_vi_nxv8i32( %va, @icmp_ugt_vi_swap_nxv8i32( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i32: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma -; CHECK-NEXT: vmsltu.vx v12, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v12, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v12 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 4, i32 0 @@ -1982,9 +1969,8 @@ define @icmp_sgt_vi_nxv8i32( %va, @icmp_sgt_vi_swap_nxv8i32( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i32: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma -; CHECK-NEXT: vmslt.vx v12, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v12, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v12 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 4, i32 0 @@ -2176,10 +2162,8 @@ define @icmp_sle_vi_nxv8i32( %va, @icmp_sle_vi_swap_nxv8i32( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_nxv8i32: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, mu -; CHECK-NEXT: vmv.v.i v16, 4 ; CHECK-NEXT: vsetvli zero, a0, e32, m4, ta, ma -; CHECK-NEXT: vmsle.vv v12, v16, v8, v0.t +; CHECK-NEXT: vmsgt.vi v12, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v12 ; CHECK-NEXT: ret %elt.head = insertelement poison, i32 4, i32 0 @@ -2439,9 +2423,8 @@ define @icmp_ugt_vi_nxv1i64( %va, @icmp_ugt_vi_swap_nxv1i64( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_nxv1i64: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma -; CHECK-NEXT: vmsltu.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -2700,9 +2683,8 @@ define @icmp_sgt_vi_nxv1i64( %va, @icmp_sgt_vi_swap_nxv1i64( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_nxv1i64: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma -; CHECK-NEXT: vmslt.vx v0, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -2963,10 +2945,8 @@ define @icmp_sle_vi_nxv1i64( %va, @icmp_sle_vi_swap_nxv1i64( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_nxv1i64: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetvli a1, zero, e64, m1, ta, mu -; CHECK-NEXT: vmv.v.i v9, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m1, ta, ma -; CHECK-NEXT: vmsle.vv v0, v9, v8, v0.t +; CHECK-NEXT: vmsgt.vi v0, v8, 3, v0.t ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 4, i32 0 %vb = shufflevector %elt.head, poison, zeroinitializer @@ -3245,9 +3225,8 @@ define @icmp_ugt_vi_nxv8i64( %va, @icmp_ugt_vi_swap_nxv8i64( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_ugt_vi_swap_nxv8i64: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma -; CHECK-NEXT: vmsltu.vx v16, v8, a1, v0.t +; CHECK-NEXT: vmsleu.vi v16, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v16 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 4, i32 0 @@ -3527,9 +3506,8 @@ define @icmp_sgt_vi_nxv8i64( %va, @icmp_sgt_vi_swap_nxv8i64( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sgt_vi_swap_nxv8i64: ; CHECK: # %bb.0: -; CHECK-NEXT: li a1, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma -; CHECK-NEXT: vmslt.vx v16, v8, a1, v0.t +; CHECK-NEXT: vmsle.vi v16, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v16 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 4, i32 0 @@ -3811,10 +3789,8 @@ define @icmp_sle_vi_nxv8i64( %va, @icmp_sle_vi_swap_nxv8i64( %va, %m, i32 zeroext %evl) { ; CHECK-LABEL: icmp_sle_vi_swap_nxv8i64: ; CHECK: # %bb.0: -; CHECK-NEXT: vsetvli a1, zero, e64, m8, ta, mu -; CHECK-NEXT: vmv.v.i v24, 4 ; CHECK-NEXT: vsetvli zero, a0, e64, m8, ta, ma -; CHECK-NEXT: vmsle.vv v16, v24, v8, v0.t +; CHECK-NEXT: vmsgt.vi v16, v8, 3, v0.t ; CHECK-NEXT: vmv1r.v v0, v16 ; CHECK-NEXT: ret %elt.head = insertelement poison, i64 4, i32 0 -- 2.7.4