From 81e9dd1ed7040a1136e1fe9f8971d79babbb7199 Mon Sep 17 00:00:00 2001 From: "Diogo N. Sampaio" Date: Fri, 6 Jul 2018 14:41:09 +0000 Subject: [PATCH] Commit rL336426 cause buildbot failures http://green.lab.llvm.org/green/job/clang-stage1-cmake-RA-incremental/50537/testReport/junit/LLVM/CodeGen_AArch64/FoldRedundantShiftedMasking_ll/ This removes the comments of the function label causing this error. llvm-svn: 336440 --- llvm/test/CodeGen/AArch64/FoldRedundantShiftedMasking.ll | 6 +++--- llvm/test/CodeGen/ARM/FoldRedundantShiftedMasking.ll | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/llvm/test/CodeGen/AArch64/FoldRedundantShiftedMasking.ll b/llvm/test/CodeGen/AArch64/FoldRedundantShiftedMasking.ll index 02b308f..5930615 100644 --- a/llvm/test/CodeGen/AArch64/FoldRedundantShiftedMasking.ll +++ b/llvm/test/CodeGen/AArch64/FoldRedundantShiftedMasking.ll @@ -1,4 +1,4 @@ -; RUN: llc -march=aarch64 < %s | FileCheck %s -check-prefix=A64 +; RUN: llc -march=aarch64 %s -o - | FileCheck %s -check-prefix=A64 define i32 @ror(i32 %a) { entry: @@ -77,7 +77,7 @@ entry: %4 = or i32 %1, %3 ret i32 %4 } -; A64-LABEL:shl_nogood: // @shl_nogood +; A64-LABEL: shl_nogood: ; A64: sxth w8, w0 ; A64-NEXT: mov w9, #172 ; A64-NEXT: and w9, w8, w9 @@ -86,7 +86,7 @@ entry: ; A64-NEXT: and w8, w8, w10 ; A64-NEXT: orr w0, w9, w8 ; A64-NEXT: ret -; A64-LABEL:shl_nogood2: // @shl_nogood2 +; A64-LABEL: shl_nogood2: ; A64: sxth w8, w0 ; A64-NEXT: mov w9, #172 ; A64-NEXT: and w9, w8, w9 diff --git a/llvm/test/CodeGen/ARM/FoldRedundantShiftedMasking.ll b/llvm/test/CodeGen/ARM/FoldRedundantShiftedMasking.ll index 0b7294b..52fdf3d 100644 --- a/llvm/test/CodeGen/ARM/FoldRedundantShiftedMasking.ll +++ b/llvm/test/CodeGen/ARM/FoldRedundantShiftedMasking.ll @@ -1,7 +1,7 @@ target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" target triple = "armv4t-arm-none-eabi" -; RUN: llc -march=arm < %s | FileCheck %s -check-prefix=ARM +; RUN: llc -march=arm %s -o - | FileCheck %s -check-prefix=ARM define i32 @ror(i32 %a) { entry: @@ -78,7 +78,7 @@ entry: %4 = or i32 %1, %3 ret i32 %4 } -; ARM-LABEL:shl_nogood: +; ARM-LABEL: shl_nogood: ; ARM: lsl r0, r0, #16 ; ARM-NEXT: mov r1, #172 ; ARM-NEXT: and r1, r1, r0, asr #16 @@ -87,7 +87,7 @@ entry: ; ARM-NEXT: and r0, r2, r0, lsl r1 ; ARM-NEXT: orr r0, r1, r0 ; ARM-NEXT: mov pc, lr -; ARM-LABEL:shl_nogood2: +; ARM-LABEL: shl_nogood2: ; ARM: lsl r0, r0, #16 ; ARM-NEXT: mov r1, #172 ; ARM-NEXT: asr r2, r0, #16 -- 2.7.4