From 80a3c218eb61b3559bfd5c42f56cabb56cff3938 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Sun, 8 May 2022 18:20:27 +0200 Subject: [PATCH] radv: Rename SPM functions. Reviewed-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/radv_perfcounter.c | 6 +++--- src/amd/vulkan/radv_private.h | 8 +++++--- src/amd/vulkan/radv_sqtt.c | 8 ++++---- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/amd/vulkan/radv_perfcounter.c b/src/amd/vulkan/radv_perfcounter.c index a384830..b328551 100644 --- a/src/amd/vulkan/radv_perfcounter.c +++ b/src/amd/vulkan/radv_perfcounter.c @@ -36,7 +36,7 @@ radv_perfcounter_emit_shaders(struct radeon_cmdbuf *cs, unsigned shaders) } void -radv_perfcounter_emit_reset(struct radeon_cmdbuf *cs) +radv_perfcounter_emit_spm_reset(struct radeon_cmdbuf *cs) { radeon_set_uconfig_reg(cs, R_036020_CP_PERFMON_CNTL, S_036020_PERFMON_STATE(V_036020_CP_PERFMON_STATE_DISABLE_AND_RESET) | @@ -44,7 +44,7 @@ radv_perfcounter_emit_reset(struct radeon_cmdbuf *cs) } void -radv_perfcounter_emit_start(struct radv_device *device, struct radeon_cmdbuf *cs, int family) +radv_perfcounter_emit_spm_start(struct radv_device *device, struct radeon_cmdbuf *cs, int family) { /* Start SPM counters. */ radeon_set_uconfig_reg(cs, R_036020_CP_PERFMON_CNTL, @@ -60,7 +60,7 @@ radv_perfcounter_emit_start(struct radv_device *device, struct radeon_cmdbuf *cs } void -radv_perfcounter_emit_stop(struct radv_device *device, struct radeon_cmdbuf *cs, int family) +radv_perfcounter_emit_spm_stop(struct radv_device *device, struct radeon_cmdbuf *cs, int family) { /* Stop windowed performance counters. */ if (family == RADV_QUEUE_GENERAL) { diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 1c3a51e..d0e5162 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -3105,9 +3105,11 @@ radv_accel_struct_get_va(const struct radv_acceleration_structure *accel) /* radv_perfcounter.c */ void radv_perfcounter_emit_shaders(struct radeon_cmdbuf *cs, unsigned shaders); -void radv_perfcounter_emit_reset(struct radeon_cmdbuf *cs); -void radv_perfcounter_emit_start(struct radv_device *device, struct radeon_cmdbuf *cs, int family); -void radv_perfcounter_emit_stop(struct radv_device *device, struct radeon_cmdbuf *cs, int family); +void radv_perfcounter_emit_spm_reset(struct radeon_cmdbuf *cs); +void radv_perfcounter_emit_spm_start(struct radv_device *device, struct radeon_cmdbuf *cs, + int family); +void radv_perfcounter_emit_spm_stop(struct radv_device *device, struct radeon_cmdbuf *cs, + int family); /* radv_spm.c */ bool radv_spm_init(struct radv_device *device); diff --git a/src/amd/vulkan/radv_sqtt.c b/src/amd/vulkan/radv_sqtt.c index f2bc8d2..7c5c5be 100644 --- a/src/amd/vulkan/radv_sqtt.c +++ b/src/amd/vulkan/radv_sqtt.c @@ -568,7 +568,7 @@ radv_begin_thread_trace(struct radv_queue *queue) /* Enable SQG events that collects thread trace data. */ radv_emit_spi_config_cntl(device, cs, true); - radv_perfcounter_emit_reset(cs); + radv_perfcounter_emit_spm_reset(cs); if (device->spm_trace.bo) { /* Enable all shader stages by default. */ @@ -581,7 +581,7 @@ radv_begin_thread_trace(struct radv_queue *queue) radv_emit_thread_trace_start(device, cs, family); if (device->spm_trace.bo) - radv_perfcounter_emit_start(device, cs, family); + radv_perfcounter_emit_spm_start(device, cs, family); result = ws->cs_finalize(cs); if (result != VK_SUCCESS) { @@ -632,12 +632,12 @@ radv_end_thread_trace(struct radv_queue *queue) radv_emit_wait_for_idle(device, cs, family); if (device->spm_trace.bo) - radv_perfcounter_emit_stop(device, cs, family); + radv_perfcounter_emit_spm_stop(device, cs, family); /* Stop SQTT. */ radv_emit_thread_trace_stop(device, cs, family); - radv_perfcounter_emit_reset(cs); + radv_perfcounter_emit_spm_reset(cs); /* Restore previous state by disabling SQG events. */ radv_emit_spi_config_cntl(device, cs, false); -- 2.7.4