From 80723c3fe457a5d29c178da4ac72983f47b37ed7 Mon Sep 17 00:00:00 2001 From: Nishanth Menon Date: Mon, 20 Dec 2010 14:05:08 -0600 Subject: [PATCH] OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_mode Currently omap3_cpuidle_update_states makes whole sale decision on which C states to update based on enable_off_mode variable Instead, achieve the same functionality by independently providing mpu and core deepest states the system is allowed to achieve and update the idle states accordingly. Acked-by: Santosh Shilimkar Acked-by: Jean Pihet Signed-off-by: Nishanth Menon [khilman: fixed additional user of this API in OMAP CPUidle driver] Signed-off-by: Kevin Hilman --- arch/arm/mach-omap2/cpuidle34xx.c | 24 ++++++++++++++---------- arch/arm/mach-omap2/pm.h | 2 +- arch/arm/mach-omap2/pm34xx.c | 2 +- 3 files changed, 16 insertions(+), 12 deletions(-) diff --git a/arch/arm/mach-omap2/cpuidle34xx.c b/arch/arm/mach-omap2/cpuidle34xx.c index 0d50b45..f290e48 100644 --- a/arch/arm/mach-omap2/cpuidle34xx.c +++ b/arch/arm/mach-omap2/cpuidle34xx.c @@ -293,25 +293,26 @@ select_state: DEFINE_PER_CPU(struct cpuidle_device, omap3_idle_dev); /** - * omap3_cpuidle_update_states - Update the cpuidle states. + * omap3_cpuidle_update_states() - Update the cpuidle states + * @mpu_deepest_state: Enable states upto and including this for mpu domain + * @core_deepest_state: Enable states upto and including this for core domain * - * Currently, this function toggles the validity of idle states based upon - * the flag 'enable_off_mode'. When the flag is set all states are valid. - * Else, states leading to OFF state set to be invalid. + * This goes through the list of states available and enables and disables the + * validity of C states based on deepest state that can be achieved for the + * variable domain */ -void omap3_cpuidle_update_states(void) +void omap3_cpuidle_update_states(u32 mpu_deepest_state, u32 core_deepest_state) { int i; for (i = OMAP3_STATE_C1; i < OMAP3_MAX_STATES; i++) { struct omap3_processor_cx *cx = &omap3_power_states[i]; - if (enable_off_mode) { + if ((cx->mpu_state >= mpu_deepest_state) && + (cx->core_state >= core_deepest_state)) { cx->valid = 1; } else { - if ((cx->mpu_state == PWRDM_POWER_OFF) || - (cx->core_state == PWRDM_POWER_OFF)) - cx->valid = 0; + cx->valid = 0; } } } @@ -504,7 +505,10 @@ int __init omap3_idle_init(void) return -EINVAL; dev->state_count = count; - omap3_cpuidle_update_states(); + if (enable_off_mode) + omap3_cpuidle_update_states(PWRDM_POWER_OFF, PWRDM_POWER_OFF); + else + omap3_cpuidle_update_states(PWRDM_POWER_RET, PWRDM_POWER_RET); if (cpuidle_register_device(dev)) { printk(KERN_ERR "%s: CPUidle register device failed\n", diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h index 5e0bee9..29663cc 100644 --- a/arch/arm/mach-omap2/pm.h +++ b/arch/arm/mach-omap2/pm.h @@ -58,7 +58,7 @@ extern u32 sleep_while_idle; #endif #if defined(CONFIG_CPU_IDLE) -extern void omap3_cpuidle_update_states(void); +extern void omap3_cpuidle_update_states(u32, u32); #endif #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 96e309d..74bc15e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -917,7 +917,7 @@ void omap3_pm_off_mode_enable(int enable) state = PWRDM_POWER_RET; #ifdef CONFIG_CPU_IDLE - omap3_cpuidle_update_states(); + omap3_cpuidle_update_states(state, state); #endif list_for_each_entry(pwrst, &pwrst_list, node) { -- 2.7.4