From 8033141140fe238f9f776166b9d4b26dcd232270 Mon Sep 17 00:00:00 2001 From: Simon Pilgrim Date: Sat, 19 Nov 2022 18:15:32 +0000 Subject: [PATCH] [X86] Remove unnecessary STC instruction overrides Reported by D138359 --- llvm/lib/Target/X86/X86SchedHaswell.td | 3 +-- llvm/lib/Target/X86/X86SchedIceLake.td | 3 +-- llvm/lib/Target/X86/X86SchedSkylakeClient.td | 3 +-- llvm/lib/Target/X86/X86SchedSkylakeServer.td | 3 +-- 4 files changed, 4 insertions(+), 8 deletions(-) diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td index 2cc479b..4d010bf 100644 --- a/llvm/lib/Target/X86/X86SchedHaswell.td +++ b/llvm/lib/Target/X86/X86SchedHaswell.td @@ -957,8 +957,7 @@ def HWWriteResGroup10 : SchedWriteRes<[HWPort0156]> { let NumMicroOps = 1; let ResourceCycles = [1]; } -def: InstRW<[HWWriteResGroup10], (instrs STC, - SGDT64m, +def: InstRW<[HWWriteResGroup10], (instrs SGDT64m, SIDT64m, SMSW16m, STRm, diff --git a/llvm/lib/Target/X86/X86SchedIceLake.td b/llvm/lib/Target/X86/X86SchedIceLake.td index 040d2af..a05b2f5e 100644 --- a/llvm/lib/Target/X86/X86SchedIceLake.td +++ b/llvm/lib/Target/X86/X86SchedIceLake.td @@ -727,8 +727,7 @@ def ICXWriteResGroup10 : SchedWriteRes<[ICXPort0156]> { let NumMicroOps = 1; let ResourceCycles = [1]; } -def: InstRW<[ICXWriteResGroup10], (instrs STC, - SGDT64m, +def: InstRW<[ICXWriteResGroup10], (instrs SGDT64m, SIDT64m, SMSW16m, STRm, diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td index e6d7a46..896e0cd 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -689,8 +689,7 @@ def SKLWriteResGroup10 : SchedWriteRes<[SKLPort0156]> { let NumMicroOps = 1; let ResourceCycles = [1]; } -def: InstRW<[SKLWriteResGroup10], (instrs STC, - SGDT64m, +def: InstRW<[SKLWriteResGroup10], (instrs SGDT64m, SIDT64m, SMSW16m, STRm, diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td index 7d45b17..ac5a7e5 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td @@ -709,8 +709,7 @@ def SKXWriteResGroup10 : SchedWriteRes<[SKXPort0156]> { let NumMicroOps = 1; let ResourceCycles = [1]; } -def: InstRW<[SKXWriteResGroup10], (instrs STC, - SGDT64m, +def: InstRW<[SKXWriteResGroup10], (instrs SGDT64m, SIDT64m, SMSW16m, STRm, -- 2.7.4