From 7f3af6d379c17fc35e3e2ec3151ae98862191f7c Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sat, 18 Jan 2014 13:42:10 +0100 Subject: [PATCH] i386.c (ix86_adjust_cost): Reorder PROCESSOR_K8 and PROCESSOR_ATHLON to simplify code. * config/i386/i386.c (ix86_adjust_cost): Reorder PROCESSOR_K8 and PROCESSOR_ATHLON to simplify code. Move "memory" calculation. * config/i386/i386.md (*swap): Rename from swap. From-SVN: r206753 --- gcc/ChangeLog | 38 ++++++++++++++++++++------------------ gcc/config/i386/i386.c | 30 +++++++++++++++--------------- gcc/config/i386/i386.md | 2 +- 3 files changed, 36 insertions(+), 34 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 82421c7..379ef8e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2014-01-18 Uros Bizjak + + * config/i386/i386.c (ix86_adjust_cost): Reorder PROCESSOR_K8 + and PROCESSOR_ATHLON to simplify code. Move "memory" calculation. + +2014-01-18 Uros Bizjak + + * config/i386/i386.md (*swap): Rename from swap. + 2014-01-18 Jakub Jelinek PR target/58944 @@ -12,8 +21,7 @@ 2014-01-17 H.J. Lu - * config/i386/i386.c (ix86_split_lea_for_addr): Fix a comment - typo. + * config/i386/i386.c (ix86_split_lea_for_addr): Fix a comment typo. 2014-01-17 John David Anglin @@ -92,8 +100,8 @@ * config/i386/i386.h (TARGET_INTEL): New. (TARGET_AVOID_LEA_FOR_ADDR): Likewise. (processor_type): Add PROCESSOR_INTEL. - * config/i386/x86-tune.def: Support m_INTEL. Duplicate - m_SILVERMONT. Add X86_TUNE_AVOID_LEA_FOR_ADDR. + * config/i386/x86-tune.def: Support m_INTEL. Duplicate m_SILVERMONT. + Add X86_TUNE_AVOID_LEA_FOR_ADDR. 2014-01-17 Marek Polacek @@ -233,16 +241,14 @@ * expr.c (expand_expr_real_1): Handle init == NULL_TREE. PR target/59839 - * config/i386/i386.c (ix86_expand_builtin): If target doesn't - satisfy operand 0 predicate for gathers, use a new pseudo as - subtarget. + * config/i386/i386.c (ix86_expand_builtin): If target doesn't satisfy + operand 0 predicate for gathers, use a new pseudo as subtarget. 2014-01-16 Vladimir Makarov PR middle-end/59609 - * lra-constraints.c (process_alt_operands): Add printing debug - info. Check absence of input/output reloads for matched operands - too. + * lra-constraints.c (process_alt_operands): Add printing debug info. + Check absence of input/output reloads for matched operands too. 2014-01-16 Vladimir Makarov @@ -287,8 +293,7 @@ (output_constructor_regular_field): Likewise. Also do not complain if the total number of bytes emitted is now greater than the expected fieldpos. - * output.h (output_constant): Update prototype and descriptive - comment. + * output.h (output_constant): Update prototype and descriptive comment. 2014-01-16 Marek Polacek @@ -785,12 +790,10 @@ (partition_stack_vars): Likewise. * asan.c (asan_emit_stack_protection): Optionally disable after return stack usage. - (instrument_derefs): Optionally disable memory - access instrumentation. + (instrument_derefs): Optionally disable memory access instrumentation. (instrument_builtin_call): Likewise. (instrument_strlen_call): Likewise. - (asan_protect_global): Optionally disable - global variables protection. + (asan_protect_global): Optionally disable global variables protection. * doc/invoke.texi: Added doc for new options. * params.def: Added new options. * params.h: Likewise. @@ -1082,8 +1085,7 @@ 2014-01-03 Andreas Schwab * config/m68k/m68k.c (handle_move_double): Handle pushes with - overlapping registers also for registers other than the stack - pointer. + overlapping registers also for registers other than the stack pointer. 2014-01-03 Marek Polacek diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index aeae46d..ff210c8 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -25491,8 +25491,6 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) break; case PROCESSOR_PENTIUMPRO: - memory = get_attr_memory (insn); - /* INT->FP conversion is expensive. */ if (get_attr_fp_int_src (dep_insn)) cost += 5; @@ -25505,6 +25503,8 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) && MEM_P (SET_DEST (set2))) cost += 1; + memory = get_attr_memory (insn); + /* Show ability of reorder buffer to hide latency of load by executing in parallel with previous instruction in case previous instruction is not needed to compute the address. */ @@ -25522,10 +25522,8 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) break; case PROCESSOR_K6: - memory = get_attr_memory (insn); - - /* The esp dependency is resolved before the instruction is really - finished. */ + /* The esp dependency is resolved before + the instruction is really finished. */ if ((insn_type == TYPE_PUSH || insn_type == TYPE_POP) && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) return 1; @@ -25534,6 +25532,8 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) if (get_attr_fp_int_src (dep_insn)) cost += 5; + memory = get_attr_memory (insn); + /* Show ability of reorder buffer to hide latency of load by executing in parallel with previous instruction in case previous instruction is not needed to compute the address. */ @@ -25552,8 +25552,6 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) } break; - case PROCESSOR_ATHLON: - case PROCESSOR_K8: case PROCESSOR_AMDFAM10: case PROCESSOR_BDVER1: case PROCESSOR_BDVER2: @@ -25562,13 +25560,15 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) case PROCESSOR_BTVER1: case PROCESSOR_BTVER2: case PROCESSOR_GENERIC: - memory = get_attr_memory (insn); - /* Stack engine allows to execute push&pop instructions in parall. */ - if (((insn_type == TYPE_PUSH || insn_type == TYPE_POP) - && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) - && (!TARGET_ATHLON && !TARGET_K8)) + if ((insn_type == TYPE_PUSH || insn_type == TYPE_POP) + && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) return 0; + /* FALLTHRU */ + + case PROCESSOR_ATHLON: + case PROCESSOR_K8: + memory = get_attr_memory (insn); /* Show ability of reorder buffer to hide latency of load by executing in parallel with previous instruction in case @@ -25600,13 +25600,13 @@ ix86_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost) case PROCESSOR_NEHALEM: case PROCESSOR_SANDYBRIDGE: case PROCESSOR_HASWELL: - memory = get_attr_memory (insn); - /* Stack engine allows to execute push&pop instructions in parall. */ if ((insn_type == TYPE_PUSH || insn_type == TYPE_POP) && (dep_insn_type == TYPE_PUSH || dep_insn_type == TYPE_POP)) return 0; + memory = get_attr_memory (insn); + /* Show ability of reorder buffer to hide latency of load by executing in parallel with previous instruction in case previous instruction is not needed to compute the address. */ diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 954bbed..e30f389 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -2466,7 +2466,7 @@ (set_attr "memory" "load") (set_attr "mode" "")]) -(define_insn "swap" +(define_insn "*swap" [(set (match_operand:SWI48 0 "register_operand" "+r") (match_operand:SWI48 1 "register_operand" "+r")) (set (match_dup 1) -- 2.7.4