From 7f210f107b413dd4fbc52fcb5f1d68b127384da2 Mon Sep 17 00:00:00 2001 From: dj Date: Wed, 16 Oct 2013 22:55:34 +0000 Subject: [PATCH] * config/rl78/rl78.c (rl78_alloc_address_registers_macax): Verify op is a REG before checking REGNO. (rl78_alloc_physical_registers): Verify pattern is a SET before checking SET_SRC. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@203733 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 7 +++++++ gcc/config/rl78/rl78.c | 6 ++++-- 2 files changed, 11 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2b82bd5..83541b2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2013-10-16 DJ Delorie + + * config/rl78/rl78.c (rl78_alloc_address_registers_macax): Verify + op is a REG before checking REGNO. + (rl78_alloc_physical_registers): Verify pattern is a SET before + checking SET_SRC. + 2013-10-16 Bill Schmidt * gcc/config/rs6000/vector.md (vec_unpacks_hi_v4sf): Correct for diff --git a/gcc/config/rl78/rl78.c b/gcc/config/rl78/rl78.c index 0e38596..995f3b1 100644 --- a/gcc/config/rl78/rl78.c +++ b/gcc/config/rl78/rl78.c @@ -3050,7 +3050,8 @@ rl78_alloc_address_registers_macax (rtx insn) OP (op) = transcode_memory_rtx (OP (op), HL, insn); if (op == 2 && MEM_P (OP (op)) - && (REGNO (XEXP (OP (op), 0)) == SP_REG + && ((GET_CODE (XEXP (OP (op), 0)) == REG + && REGNO (XEXP (OP (op), 0)) == SP_REG) || (GET_CODE (XEXP (OP (op), 0)) == PLUS && REGNO (XEXP (XEXP (OP (op), 0), 0)) == SP_REG))) { @@ -3140,7 +3141,8 @@ rl78_alloc_physical_registers (void) if (GET_CODE (pattern) != SET && GET_CODE (pattern) != CALL) continue; - if (GET_CODE (SET_SRC (pattern)) == ASM_OPERANDS) + if (GET_CODE (pattern) == SET + && GET_CODE (SET_SRC (pattern)) == ASM_OPERANDS) continue; valloc_method = get_attr_valloc (insn); -- 2.7.4