From 7f1b9196cbcd8b8d661fbea4cfc813092c5bd8fc Mon Sep 17 00:00:00 2001
From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Mon, 12 Mar 2018 21:35:12 +0000
Subject: [PATCH] [X86][Btver2] Clean up formatting/comments in scheduler
 model. NFCI.

Moved 'special cases' to be closer to other system classes.

llvm-svn: 327332
---
 llvm/lib/Target/X86/X86ScheduleBtVer2.td | 29 ++++++++++++++++++-----------
 1 file changed, 18 insertions(+), 11 deletions(-)

diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td
index 5735588..ada5f3f 100644
--- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td
+++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td
@@ -83,7 +83,7 @@ multiclass JWriteResIntPair<X86FoldableSchedWrite SchedRW,
   // Memory variant also uses a cycle on JLAGU and adds 3 cycles to the
   // latency.
   def : WriteRes<SchedRW.Folded, [JLAGU, ExePort]> {
-     let Latency = !add(Lat, 3);
+    let Latency = !add(Lat, 3);
   }
 }
 
@@ -100,9 +100,9 @@ multiclass JWriteResFpuPair<X86FoldableSchedWrite SchedRW,
   // Memory variant also uses a cycle on JLAGU and adds 5 cycles to the
   // latency.
   def : WriteRes<SchedRW.Folded, [JLAGU, ExePort]> {
-     let Latency = !add(Lat, 5);
-     let ResourceCycles = [1, Res];
-     let NumMicroOps = UOps;
+    let Latency = !add(Lat, 5);
+    let ResourceCycles = [1, Res];
+    let NumMicroOps = UOps;
   }
 }
 
@@ -194,11 +194,20 @@ def : WriteRes<WriteZero,  []>;
 defm : JWriteResIntPair<WriteJump,  JALU01, 1>;
 
 ////////////////////////////////////////////////////////////////////////////////
+// Special case scheduling classes.
+// FIXME: pipe for system/microcode?
+////////////////////////////////////////////////////////////////////////////////
+
+def : WriteRes<WriteSystem,     [JAny]> { let Latency = 100; }
+def : WriteRes<WriteMicrocoded, [JAny]> { let Latency = 100; }
+def : WriteRes<WriteFence,  [JSAGU]>;
+def : WriteRes<WriteNop, []>;
+
+////////////////////////////////////////////////////////////////////////////////
 // Floating point. This covers both scalar and vector operations.
 // FIXME: should we bother splitting JFPU pipe + unit stages for fast instructions?
 // FIXME: Double precision latencies
 // FIXME: SS vs PS latencies
-// FIXME: ymm latencies
 ////////////////////////////////////////////////////////////////////////////////
 
 defm : JWriteResFpuPair<WriteFAdd,        JFPU0,  3>;
@@ -229,7 +238,11 @@ def : WriteRes<WriteFDivLd, [JFPU1, JLAGU, JFPM]> {
   let ResourceCycles = [1, 1, 19];
 }
 
+////////////////////////////////////////////////////////////////////////////////
+// Conversions.
 // FIXME: integer pipes
+////////////////////////////////////////////////////////////////////////////////
+
 defm : JWriteResFpuPair<WriteCvtF2I,    JFPU1,  3>; // Float -> Integer.
 defm : JWriteResFpuPair<WriteCvtI2F,    JFPU1,  3>; // Integer -> Float.
 defm : JWriteResFpuPair<WriteCvtF2F,    JFPU1,  3>; // Float -> Float size conversion.
@@ -333,12 +346,6 @@ def : InstRW<[JWriteFHAddYLd], (instrs VHADDPDYrm, VHADDPSYrm, VHSUBPDYrm, VHSUB
 
 defm : JWriteResFpuPair<WriteCLMul,   JVIMUL, 2>;
 
-// FIXME: pipe for system/microcode?
-def : WriteRes<WriteSystem,     [JAny]> { let Latency = 100; }
-def : WriteRes<WriteMicrocoded, [JAny]> { let Latency = 100; }
-def : WriteRes<WriteFence,  [JSAGU]>;
-def : WriteRes<WriteNop, []>;
-
 ////////////////////////////////////////////////////////////////////////////////
 // SSE4.1 instructions.
 ////////////////////////////////////////////////////////////////////////////////
-- 
2.7.4