From 7f189cd7408da52e21dc2506a66130013f87cb8c Mon Sep 17 00:00:00 2001 From: Qiufang Dai Date: Tue, 29 Aug 2017 15:14:01 +0800 Subject: [PATCH] pcie: move mipi gate control to pcie driver. PD#147022: pcie: mipi share gate control. Change-Id: I85d9676e39db548b39c4c9d3ece0ca1572bffe26 Signed-off-by: Qiufang Dai --- arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts | 8 +++++ arch/arm64/boot/dts/amlogic/axg_s400.dts | 8 +++++ arch/arm64/boot/dts/amlogic/axg_s400_v03.dts | 8 +++++ drivers/amlogic/clk/axg/axg_clk-pll.c | 11 +------ drivers/amlogic/pci/pcie-amlogic.c | 44 +++++++++++++++++++++++++-- 5 files changed, 67 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts b/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts index 2a9c041..a89e2cd 100644 --- a/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts +++ b/arch/arm64/boot/dts/amlogic/axg_a113d_skt.dts @@ -317,10 +317,14 @@ clocks = <&clkc CLKID_USB_GENERAL &clkc CLKID_PCIE_PLL + &clkc CLKID_MIPI_ENABLE_GATE + &clkc CLKID_MIPI_BANDGAP_GATE &clkc CLKID_PCIE_A &clkc CLKID_PCIE_CML_EN0>; clock-names = "pcie_general", "pcie_refpll", + "pcie_mipi_enable_gate", + "pcie_mipi_bandgap_gate", "pcie", "port"; /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ @@ -352,10 +356,14 @@ clocks = <&clkc CLKID_USB_GENERAL &clkc CLKID_PCIE_PLL + &clkc CLKID_MIPI_ENABLE_GATE + &clkc CLKID_MIPI_BANDGAP_GATE &clkc CLKID_PCIE_B &clkc CLKID_PCIE_CML_EN1>; clock-names = "pcie_general", "pcie_refpll", + "pcie_mipi_enable_gate", + "pcie_mipi_bandgap_gate", "pcie", "port"; /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ diff --git a/arch/arm64/boot/dts/amlogic/axg_s400.dts b/arch/arm64/boot/dts/amlogic/axg_s400.dts index 3e80d7e..24efa57 100644 --- a/arch/arm64/boot/dts/amlogic/axg_s400.dts +++ b/arch/arm64/boot/dts/amlogic/axg_s400.dts @@ -324,10 +324,14 @@ clocks = <&clkc CLKID_USB_GENERAL &clkc CLKID_PCIE_PLL + &clkc CLKID_MIPI_ENABLE_GATE + &clkc CLKID_MIPI_BANDGAP_GATE &clkc CLKID_PCIE_A &clkc CLKID_PCIE_CML_EN0>; clock-names = "pcie_general", "pcie_refpll", + "pcie_mipi_enable_gate", + "pcie_mipi_bandgap_gate", "pcie", "port"; /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ @@ -359,10 +363,14 @@ clocks = <&clkc CLKID_USB_GENERAL &clkc CLKID_PCIE_PLL + &clkc CLKID_MIPI_ENABLE_GATE + &clkc CLKID_MIPI_BANDGAP_GATE &clkc CLKID_PCIE_B &clkc CLKID_PCIE_CML_EN1>; clock-names = "pcie_general", "pcie_refpll", + "pcie_mipi_enable_gate", + "pcie_mipi_bandgap_gate", "pcie", "port"; /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ diff --git a/arch/arm64/boot/dts/amlogic/axg_s400_v03.dts b/arch/arm64/boot/dts/amlogic/axg_s400_v03.dts index e2fc44d..23167e3 100644 --- a/arch/arm64/boot/dts/amlogic/axg_s400_v03.dts +++ b/arch/arm64/boot/dts/amlogic/axg_s400_v03.dts @@ -324,10 +324,14 @@ clocks = <&clkc CLKID_USB_GENERAL &clkc CLKID_PCIE_PLL + &clkc CLKID_MIPI_ENABLE_GATE + &clkc CLKID_MIPI_BANDGAP_GATE &clkc CLKID_PCIE_A &clkc CLKID_PCIE_CML_EN0>; clock-names = "pcie_general", "pcie_refpll", + "pcie_mipi_enable_gate", + "pcie_mipi_bandgap_gate", "pcie", "port"; /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ @@ -359,10 +363,14 @@ clocks = <&clkc CLKID_USB_GENERAL &clkc CLKID_PCIE_PLL + &clkc CLKID_MIPI_ENABLE_GATE + &clkc CLKID_MIPI_BANDGAP_GATE &clkc CLKID_PCIE_B &clkc CLKID_PCIE_CML_EN1>; clock-names = "pcie_general", "pcie_refpll", + "pcie_mipi_enable_gate", + "pcie_mipi_bandgap_gate", "pcie", "port"; /*reset-gpio-type 0:Shared pad(no reset)1:OD pad2:Normal pad*/ diff --git a/drivers/amlogic/clk/axg/axg_clk-pll.c b/drivers/amlogic/clk/axg/axg_clk-pll.c index 868a0de..59cafba 100644 --- a/drivers/amlogic/clk/axg/axg_clk-pll.c +++ b/drivers/amlogic/clk/axg/axg_clk-pll.c @@ -334,11 +334,6 @@ static int meson_axg_pll_enable(struct clk_hw *hw) if (pll->lock) spin_unlock_irqrestore(pll->lock, flags); - /*pcie pll: mipi enable and bandgap share with mipi clk */ - if (!strcmp(clk_hw_get_name(hw), "pcie_pll")) { - clk_prepare_enable(clks[CLKID_MIPI_ENABLE_GATE]); - clk_prepare_enable(clks[CLKID_MIPI_BANDGAP_GATE]); - } ret = meson_axg_pll_set_rate(hw, rate, clk_get_rate(parent)); @@ -363,11 +358,7 @@ static void meson_axg_pll_disable(struct clk_hw *hw) if (pll->lock) spin_unlock_irqrestore(pll->lock, flags); } - /*pcie pll: mipi enable and bandgap share with mipi clk */ - if (!strcmp(clk_hw_get_name(hw), "pcie_pll")) { - clk_disable_unprepare(clks[CLKID_MIPI_ENABLE_GATE]); - clk_disable_unprepare(clks[CLKID_MIPI_BANDGAP_GATE]); - }; + } const struct clk_ops meson_axg_pll_ops = { diff --git a/drivers/amlogic/pci/pcie-amlogic.c b/drivers/amlogic/pci/pcie-amlogic.c index 5148bd2..107ec9e 100644 --- a/drivers/amlogic/pci/pcie-amlogic.c +++ b/drivers/amlogic/pci/pcie-amlogic.c @@ -31,6 +31,9 @@ #include "../drivers/pci/host/pcie-designware.h" #include "pcie-amlogic.h" +#include +#include +#include "../clk/clkc.h" struct amlogic_pcie { @@ -41,6 +44,8 @@ struct amlogic_pcie { int reset_gpio; struct clk *clk; struct clk *bus_clk; + struct clk *mipi_gate; + struct clk *mipi_bandgap_gate; struct clk *port_clk; struct clk *general_clk; int pcie_num; @@ -635,6 +640,8 @@ static int __init amlogic_add_pcie_port(struct amlogic_pcie *amlogic_pcie, dev_err(pp->dev, "link timeout, disable PCIE PLL\n"); clk_disable_unprepare(amlogic_pcie->port_clk); clk_disable_unprepare(amlogic_pcie->general_clk); + clk_disable_unprepare(amlogic_pcie->mipi_bandgap_gate); + clk_disable_unprepare(amlogic_pcie->mipi_gate); clk_disable_unprepare(amlogic_pcie->bus_clk); clk_disable_unprepare(amlogic_pcie->clk); if (amlogic_pcie->pcie_num == 2) { @@ -778,6 +785,28 @@ static int __init amlogic_pcie_probe(struct platform_device *pdev) if (ret) goto fail_pcie; + amlogic_pcie->mipi_gate = devm_clk_get(dev, "pcie_mipi_enable_gate"); + if (IS_ERR(amlogic_pcie->mipi_gate)) { + dev_err(dev, "Failed to get pcie mipi gate clock\n"); + ret = PTR_ERR(amlogic_pcie->mipi_gate); + goto fail_bus_clk; + } + /*pcie pll: mipi enable and bandgap share with mipi clk */ + ret = clk_prepare_enable(amlogic_pcie->mipi_gate); + if (ret) + goto fail_bus_clk; + + amlogic_pcie->mipi_bandgap_gate = devm_clk_get(dev, + "pcie_mipi_bandgap_gate"); + if (IS_ERR(amlogic_pcie->mipi_bandgap_gate)) { + dev_err(dev, "Failed to get pcie mipi bandgap gate clock\n"); + ret = PTR_ERR(amlogic_pcie->mipi_bandgap_gate); + goto fail_mipi_gate; + } + /*pcie pll: mipi enable and bandgap share with mipi clk */ + ret = clk_prepare_enable(amlogic_pcie->mipi_bandgap_gate); + if (ret) + goto fail_mipi_gate; /*RESET0[6,7] = 1*/ if (!amlogic_pcie->phy->reset_state) { @@ -791,12 +820,12 @@ static int __init amlogic_pcie_probe(struct platform_device *pdev) if (IS_ERR(amlogic_pcie->general_clk)) { dev_err(dev, "Failed to get pcie general clock\n"); ret = PTR_ERR(amlogic_pcie->general_clk); - goto fail_bus_clk; + goto fail_mipi_bandgap_gate; } ret = clk_prepare_enable(amlogic_pcie->general_clk); if (ret) - goto fail_bus_clk; + goto fail_mipi_bandgap_gate; amlogic_pcie->clk = devm_clk_get(dev, "pcie"); if (IS_ERR(amlogic_pcie->clk)) { @@ -864,10 +893,15 @@ fail_clk: clk_disable_unprepare(amlogic_pcie->clk); fail_general_clk: clk_disable_unprepare(amlogic_pcie->general_clk); +fail_mipi_bandgap_gate: + clk_disable_unprepare(amlogic_pcie->mipi_bandgap_gate); +fail_mipi_gate: + clk_disable_unprepare(amlogic_pcie->mipi_gate); fail_bus_clk: clk_disable_unprepare(amlogic_pcie->bus_clk); fail_pcie: port_num--; + return ret; } @@ -886,6 +920,8 @@ static int __exit amlogic_pcie_remove(struct platform_device *pdev) clk_disable_unprepare(amlogic_pcie->port_clk); clk_disable_unprepare(amlogic_pcie->clk); clk_disable_unprepare(amlogic_pcie->general_clk); + clk_disable_unprepare(amlogic_pcie->mipi_bandgap_gate); + clk_disable_unprepare(amlogic_pcie->mipi_gate); clk_disable_unprepare(amlogic_pcie->bus_clk); return 0; @@ -975,6 +1011,8 @@ static int amlogic_pcie_suspend_noirq(struct device *dev) clk_disable_unprepare(amlogic_pcie->port_clk); clk_disable_unprepare(amlogic_pcie->clk); clk_disable_unprepare(amlogic_pcie->general_clk); + clk_disable_unprepare(amlogic_pcie->mipi_bandgap_gate); + clk_disable_unprepare(amlogic_pcie->mipi_gate); clk_disable_unprepare(amlogic_pcie->bus_clk); amlogic_pcie->phy->reset_state = 0; @@ -1020,6 +1058,8 @@ static int amlogic_pcie_resume_noirq(struct device *dev) amlogic_pcie->phy->reset_state = 1; clk_prepare_enable(amlogic_pcie->bus_clk); + clk_prepare_enable(amlogic_pcie->mipi_gate); + clk_prepare_enable(amlogic_pcie->mipi_bandgap_gate); clk_prepare_enable(amlogic_pcie->general_clk); clk_prepare_enable(amlogic_pcie->clk); clk_prepare_enable(amlogic_pcie->port_clk); -- 2.7.4