From 7d856409db4e95fdf98660872d50d5c4ffbffb55 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Sun, 30 Jul 2017 20:50:05 -0700 Subject: [PATCH] ARM: dts: keystone-k2e: Add DSP node The Keystone 2 66AK2E SoC has one TMS320C66x DSP Core Subsystem (C66x CorePac), with a 1.4 GHz C66x Fixed or Floating-Point DSP Core, and 32 KB of L1P & L1D SRAMs and a 1 MB L2 SRAM. Add the DT node for this DSP processor sub-system. The processor does not have a MMU, and uses various IPC Generation registers and shared memory for inter-processor communication. The alias with a stem 'rproc' has also been added for the DSP, it provides a fixed remoteproc id for the DSP processor. Signed-off-by: Suman Anna Signed-off-by: Sam Nelson Signed-off-by: Andrew F. Davis Signed-off-by: Santosh Shilimkar --- arch/arm/boot/dts/keystone-k2e.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dts/keystone-k2e.dtsi b/arch/arm/boot/dts/keystone-k2e.dtsi index 0dd4cdd..819ab83 100644 --- a/arch/arm/boot/dts/keystone-k2e.dtsi +++ b/arch/arm/boot/dts/keystone-k2e.dtsi @@ -45,6 +45,10 @@ }; }; + aliases { + rproc0 = &dsp0; + }; + soc { /include/ "keystone-k2e-clocks.dtsi" @@ -114,6 +118,22 @@ gpio,syscon-dev = <&devctrl 0x240>; }; + dsp0: dsp@10800000 { + compatible = "ti,k2e-dsp"; + reg = <0x10800000 0x00080000>, + <0x10e00000 0x00008000>, + <0x10f00000 0x00008000>; + reg-names = "l2sram", "l1pram", "l1dram"; + clocks = <&clkgem0>; + ti,syscon-dev = <&devctrl 0x844>; + resets = <&pscrst 0>; + interrupt-parent = <&kirq0>; + interrupts = <0 8>; + interrupt-names = "vring", "exception"; + kick-gpios = <&dspgpio0 27 0>; + status = "disabled"; + }; + pcie1: pcie@21020000 { compatible = "ti,keystone-pcie","snps,dw-pcie"; clocks = <&clkpcie1>; -- 2.7.4