From 7cc6af0cdabb9deb55e357df71094931da1e91e8 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 16 Dec 2004 01:40:31 -0800 Subject: [PATCH] re PR target/19005 (Error: bad register name `%sil') PR target/19005 * config/i386/i386.md (swaphi_1): Swap with swaphi_2, allow with optimize_size. (swapqi_1): Rename from swapqi. Enable only for no partial reg stall and optimize_size. (swapqi_2): New. (swaphi_1, swaphi_2, swapqi_1): Add athlon_decode. (swapsi, swaphi_1, swaphi_2, swapqi_1, swapdi): Remove modrm override. From-SVN: r92250 --- gcc/ChangeLog | 15 +++++++++++++-- gcc/config/i386/i386.md | 47 ++++++++++++++++++++++++++++------------------- 2 files changed, 41 insertions(+), 21 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 6791a46..d40af36 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2004-12-15 Richard Henderson + + PR target/19005 + * config/i386/i386.md (swaphi_1): Swap with swaphi_2, allow with + optimize_size. + (swapqi_1): Rename from swapqi. Enable only for no partial reg + stall and optimize_size. + (swapqi_2): New. + (swaphi_1, swaphi_2, swapqi_1): Add athlon_decode. + (swapsi, swaphi_1, swaphi_2, swapqi_1, swapdi): Remove modrm override. + 2004-12-16 Uros Bizjak * config/i386/i386.md (*floathisf2_i387, *floathidf2_i387): @@ -57,13 +68,13 @@ on the STMT_EXPR wrapping up the inlined body. 2004-12-15 Vladimir Makarov - Steven Bosscher + Steven Bosscher PR middle end/17340 * global.c: Update comments in a few places. (check_earlyclobber): Return true if there are early clobber classes. - (calculate_local_reg_bb_info): Do not try to mark earlyclobber + (calculate_local_reg_bb_info): Do not try to mark earlyclobber regs if there are none. (bb_info, allocate_bb_info, free_bb_info, modify_reg_pav, make_accurate_live_analysis): Rename pavin, pavout to live_pavin, diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 5500de2..db6a724 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1238,10 +1238,9 @@ "" "xchg{l}\t%1, %0" [(set_attr "type" "imov") - (set_attr "pent_pair" "np") - (set_attr "athlon_decode" "vector") (set_attr "mode" "SI") - (set_attr "modrm" "0")]) + (set_attr "pent_pair" "np") + (set_attr "athlon_decode" "vector")]) (define_expand "movhi" [(set (match_operand:HI 0 "nonimmediate_operand" "") @@ -1355,24 +1354,24 @@ (match_operand:HI 1 "register_operand" "+r")) (set (match_dup 1) (match_dup 0))] - "TARGET_PARTIAL_REG_STALL" - "xchg{w}\t%1, %0" + "!TARGET_PARTIAL_REG_STALL || optimize_size" + "xchg{l}\t%k1, %k0" [(set_attr "type" "imov") + (set_attr "mode" "SI") (set_attr "pent_pair" "np") - (set_attr "mode" "HI") - (set_attr "modrm" "0")]) + (set_attr "athlon_decode" "vector")]) (define_insn "*swaphi_2" [(set (match_operand:HI 0 "register_operand" "+r") (match_operand:HI 1 "register_operand" "+r")) (set (match_dup 1) (match_dup 0))] - "! TARGET_PARTIAL_REG_STALL" - "xchg{l}\t%k1, %k0" + "TARGET_PARTIAL_REG_STALL" + "xchg{w}\t%1, %0" [(set_attr "type" "imov") + (set_attr "mode" "HI") (set_attr "pent_pair" "np") - (set_attr "mode" "SI") - (set_attr "modrm" "0")]) + (set_attr "athlon_decode" "vector")]) (define_expand "movstricthi" [(set (strict_low_part (match_operand:HI 0 "nonimmediate_operand" "")) @@ -1521,17 +1520,29 @@ DONE; }) -(define_insn "*swapqi" +(define_insn "*swapqi_1" [(set (match_operand:QI 0 "register_operand" "+r") (match_operand:QI 1 "register_operand" "+r")) (set (match_dup 1) (match_dup 0))] - "" - "xchg{b}\t%1, %0" + "!TARGET_PARTIAL_REG_STALL || optimize_size" + "xchg{l}\t%k1, %k0" [(set_attr "type" "imov") + (set_attr "mode" "SI") (set_attr "pent_pair" "np") + (set_attr "athlon_decode" "vector")]) + +(define_insn "*swapqi_2" + [(set (match_operand:QI 0 "register_operand" "+q") + (match_operand:QI 1 "register_operand" "+q")) + (set (match_dup 1) + (match_dup 0))] + "TARGET_PARTIAL_REG_STALL" + "xchg{b}\t%1, %0" + [(set_attr "type" "imov") (set_attr "mode" "QI") - (set_attr "modrm" "0")]) + (set_attr "pent_pair" "np") + (set_attr "athlon_decode" "vector")]) (define_expand "movstrictqi" [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "")) @@ -2094,12 +2105,10 @@ "TARGET_64BIT" "xchg{q}\t%1, %0" [(set_attr "type" "imov") - (set_attr "pent_pair" "np") - (set_attr "athlon_decode" "vector") (set_attr "mode" "DI") - (set_attr "modrm" "0")]) + (set_attr "pent_pair" "np") + (set_attr "athlon_decode" "vector")]) - (define_expand "movsf" [(set (match_operand:SF 0 "nonimmediate_operand" "") (match_operand:SF 1 "general_operand" ""))] -- 2.7.4