From 7cb95ac20fc160e011d32f7c7578a63133d13049 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Juha=20Riihim=C3=A4ki?= Date: Sat, 24 Oct 2009 15:19:00 +0300 Subject: [PATCH] target-arm: fix neon vshrn/vrshrn ops MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit In the existing code shift value is clobbered during the pass loop. This patch changes the code so that it stores the intermediate result in the target neon register directly and eliminates the need to use a temporary to hold the intermediate value thus leaving the shift value in the temporary variable intact. This is a new patch in this version of the patch series. Signed-off-by: Juha Riihimäki Acked-by: Laurent Desnogues Signed-off-by: Aurelien Jarno --- target-arm/translate.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 1988cc6..3fe545d 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -4680,18 +4680,12 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) else gen_neon_narrow_satu(size - 1, tmp, cpu_V0); } - if (pass == 0) { - if (size != 3) { - dead_tmp(tmp2); - } - tmp2 = tmp; - } else { - neon_store_reg(rd, 0, tmp2); - neon_store_reg(rd, 1, tmp); - } + neon_store_reg(rd, pass, tmp); } /* for pass */ if (size == 3) { tcg_temp_free_i64(tmp64); + } else { + dead_tmp(tmp2); } } else if (op == 10) { /* VSHLL */ -- 2.7.4