From 7c90e29cf8f46d4c4de772e1e64d2620b2bbaf23 Mon Sep 17 00:00:00 2001 From: Craig Topper Date: Tue, 20 Mar 2018 03:01:59 +0000 Subject: [PATCH] [X86] Add ROR/ROL/SHR/SAR by 1 instructions to the Sandy Bridge scheduler model. I assume these match the generic immediate version like they do in the other models. llvm-svn: 327943 --- llvm/lib/Target/X86/X86SchedSandyBridge.td | 8 +++ llvm/test/CodeGen/X86/schedule-x86_64.ll | 96 +++++++++++++++--------------- 2 files changed, 56 insertions(+), 48 deletions(-) diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td index fedadb1..4f53592 100644 --- a/llvm/lib/Target/X86/X86SchedSandyBridge.td +++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td @@ -426,10 +426,12 @@ def: InstRW<[SBWriteResGroup4], (instregex "CQO")>; def: InstRW<[SBWriteResGroup4], (instregex "LAHF")>; def: InstRW<[SBWriteResGroup4], (instregex "SAHF")>; def: InstRW<[SBWriteResGroup4], (instregex "SAR(8|16|32|64)ri")>; +def: InstRW<[SBWriteResGroup4], (instregex "SAR(8|16|32|64)r1")>; def: InstRW<[SBWriteResGroup4], (instregex "SET(AE|B|E|G|GE|L|LE|NE|NO|NP|NS|O|P|S)r")>; def: InstRW<[SBWriteResGroup4], (instregex "SHL(8|16|32|64)ri")>; def: InstRW<[SBWriteResGroup4], (instregex "SHL(8|16|32|64)r1")>; def: InstRW<[SBWriteResGroup4], (instregex "SHR(8|16|32|64)ri")>; +def: InstRW<[SBWriteResGroup4], (instregex "SHR(8|16|32|64)r1")>; def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDYrri")>; def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPDrri")>; def: InstRW<[SBWriteResGroup4], (instregex "VBLENDPSYrri")>; @@ -685,7 +687,9 @@ def SBWriteResGroup9 : SchedWriteRes<[SBPort05]> { } def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPDrr0")>; def: InstRW<[SBWriteResGroup9], (instregex "BLENDVPSrr0")>; +def: InstRW<[SBWriteResGroup9], (instregex "ROL(8|16|32|64)r1")>; def: InstRW<[SBWriteResGroup9], (instregex "ROL(8|16|32|64)ri")>; +def: InstRW<[SBWriteResGroup9], (instregex "ROR(8|16|32|64)r1")>; def: InstRW<[SBWriteResGroup9], (instregex "ROR(8|16|32|64)ri")>; def: InstRW<[SBWriteResGroup9], (instregex "SET(A|BE)r")>; def: InstRW<[SBWriteResGroup9], (instregex "VBLENDVPDYrr")>; @@ -1816,9 +1820,11 @@ def SBWriteResGroup69 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> { def: InstRW<[SBWriteResGroup69], (instregex "BTC(16|32|64)mi8")>; def: InstRW<[SBWriteResGroup69], (instregex "BTR(16|32|64)mi8")>; def: InstRW<[SBWriteResGroup69], (instregex "BTS(16|32|64)mi8")>; +def: InstRW<[SBWriteResGroup69], (instregex "SAR(8|16|32|64)m1")>; def: InstRW<[SBWriteResGroup69], (instregex "SAR(8|16|32|64)mi")>; def: InstRW<[SBWriteResGroup69], (instregex "SHL(8|16|32|64)m1")>; def: InstRW<[SBWriteResGroup69], (instregex "SHL(8|16|32|64)mi")>; +def: InstRW<[SBWriteResGroup69], (instregex "SHR(8|16|32|64)m1")>; def: InstRW<[SBWriteResGroup69], (instregex "SHR(8|16|32|64)mi")>; def SBWriteResGroup70 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> { @@ -2013,7 +2019,9 @@ def SBWriteResGroup85 : SchedWriteRes<[SBPort4,SBPort23,SBPort05]> { let NumMicroOps = 5; let ResourceCycles = [1,2,2]; } +def: InstRW<[SBWriteResGroup85], (instregex "ROL(8|16|32|64)m1")>; def: InstRW<[SBWriteResGroup85], (instregex "ROL(8|16|32|64)mi")>; +def: InstRW<[SBWriteResGroup85], (instregex "ROR(8|16|32|64)m1")>; def: InstRW<[SBWriteResGroup85], (instregex "ROR(8|16|32|64)mi")>; def SBWriteResGroup86 : SchedWriteRes<[SBPort4,SBPort23,SBPort015]> { diff --git a/llvm/test/CodeGen/X86/schedule-x86_64.ll b/llvm/test/CodeGen/X86/schedule-x86_64.ll index a99992d..df8bc67 100644 --- a/llvm/test/CodeGen/X86/schedule-x86_64.ll +++ b/llvm/test/CodeGen/X86/schedule-x86_64.ll @@ -11071,10 +11071,10 @@ define void @test_rol_ror_8(i8 %a0, i8 %a1, i8 *%a2) optsize { ; GENERIC-LABEL: test_rol_ror_8: ; GENERIC: # %bb.0: ; GENERIC-NEXT: #APP -; GENERIC-NEXT: rolb %dil # sched: [1:0.50] -; GENERIC-NEXT: rorb %dil # sched: [1:0.50] -; GENERIC-NEXT: rolb (%rdx) # sched: [5:1.00] -; GENERIC-NEXT: rorb (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: rolb %dil # sched: [2:1.00] +; GENERIC-NEXT: rorb %dil # sched: [2:1.00] +; GENERIC-NEXT: rolb (%rdx) # sched: [8:1.00] +; GENERIC-NEXT: rorb (%rdx) # sched: [8:1.00] ; GENERIC-NEXT: rolb $7, %dil # sched: [2:1.00] ; GENERIC-NEXT: rorb $7, %dil # sched: [2:1.00] ; GENERIC-NEXT: rolb $7, (%rdx) # sched: [8:1.00] @@ -11125,10 +11125,10 @@ define void @test_rol_ror_8(i8 %a0, i8 %a1, i8 *%a2) optsize { ; SANDY-LABEL: test_rol_ror_8: ; SANDY: # %bb.0: ; SANDY-NEXT: #APP -; SANDY-NEXT: rolb %dil # sched: [1:0.50] -; SANDY-NEXT: rorb %dil # sched: [1:0.50] -; SANDY-NEXT: rolb (%rdx) # sched: [5:1.00] -; SANDY-NEXT: rorb (%rdx) # sched: [5:1.00] +; SANDY-NEXT: rolb %dil # sched: [2:1.00] +; SANDY-NEXT: rorb %dil # sched: [2:1.00] +; SANDY-NEXT: rolb (%rdx) # sched: [8:1.00] +; SANDY-NEXT: rorb (%rdx) # sched: [8:1.00] ; SANDY-NEXT: rolb $7, %dil # sched: [2:1.00] ; SANDY-NEXT: rorb $7, %dil # sched: [2:1.00] ; SANDY-NEXT: rolb $7, (%rdx) # sched: [8:1.00] @@ -11254,10 +11254,10 @@ define void @test_rol_ror_16(i16 %a0, i16 %a1, i16 *%a2) optsize { ; GENERIC-LABEL: test_rol_ror_16: ; GENERIC: # %bb.0: ; GENERIC-NEXT: #APP -; GENERIC-NEXT: rolw %di # sched: [1:0.50] -; GENERIC-NEXT: rorw %di # sched: [1:0.50] -; GENERIC-NEXT: rolw (%rdx) # sched: [5:1.00] -; GENERIC-NEXT: rorw (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: rolw %di # sched: [2:1.00] +; GENERIC-NEXT: rorw %di # sched: [2:1.00] +; GENERIC-NEXT: rolw (%rdx) # sched: [8:1.00] +; GENERIC-NEXT: rorw (%rdx) # sched: [8:1.00] ; GENERIC-NEXT: rolw $7, %di # sched: [2:1.00] ; GENERIC-NEXT: rorw $7, %di # sched: [2:1.00] ; GENERIC-NEXT: rolw $7, (%rdx) # sched: [8:1.00] @@ -11308,10 +11308,10 @@ define void @test_rol_ror_16(i16 %a0, i16 %a1, i16 *%a2) optsize { ; SANDY-LABEL: test_rol_ror_16: ; SANDY: # %bb.0: ; SANDY-NEXT: #APP -; SANDY-NEXT: rolw %di # sched: [1:0.50] -; SANDY-NEXT: rorw %di # sched: [1:0.50] -; SANDY-NEXT: rolw (%rdx) # sched: [5:1.00] -; SANDY-NEXT: rorw (%rdx) # sched: [5:1.00] +; SANDY-NEXT: rolw %di # sched: [2:1.00] +; SANDY-NEXT: rorw %di # sched: [2:1.00] +; SANDY-NEXT: rolw (%rdx) # sched: [8:1.00] +; SANDY-NEXT: rorw (%rdx) # sched: [8:1.00] ; SANDY-NEXT: rolw $7, %di # sched: [2:1.00] ; SANDY-NEXT: rorw $7, %di # sched: [2:1.00] ; SANDY-NEXT: rolw $7, (%rdx) # sched: [8:1.00] @@ -11437,10 +11437,10 @@ define void @test_rol_ror_32(i32 %a0, i32 %a1, i32 *%a2) optsize { ; GENERIC-LABEL: test_rol_ror_32: ; GENERIC: # %bb.0: ; GENERIC-NEXT: #APP -; GENERIC-NEXT: roll %edi # sched: [1:0.50] -; GENERIC-NEXT: rorl %edi # sched: [1:0.50] -; GENERIC-NEXT: roll (%rdx) # sched: [5:1.00] -; GENERIC-NEXT: rorl (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: roll %edi # sched: [2:1.00] +; GENERIC-NEXT: rorl %edi # sched: [2:1.00] +; GENERIC-NEXT: roll (%rdx) # sched: [8:1.00] +; GENERIC-NEXT: rorl (%rdx) # sched: [8:1.00] ; GENERIC-NEXT: roll $7, %edi # sched: [2:1.00] ; GENERIC-NEXT: rorl $7, %edi # sched: [2:1.00] ; GENERIC-NEXT: roll $7, (%rdx) # sched: [8:1.00] @@ -11491,10 +11491,10 @@ define void @test_rol_ror_32(i32 %a0, i32 %a1, i32 *%a2) optsize { ; SANDY-LABEL: test_rol_ror_32: ; SANDY: # %bb.0: ; SANDY-NEXT: #APP -; SANDY-NEXT: roll %edi # sched: [1:0.50] -; SANDY-NEXT: rorl %edi # sched: [1:0.50] -; SANDY-NEXT: roll (%rdx) # sched: [5:1.00] -; SANDY-NEXT: rorl (%rdx) # sched: [5:1.00] +; SANDY-NEXT: roll %edi # sched: [2:1.00] +; SANDY-NEXT: rorl %edi # sched: [2:1.00] +; SANDY-NEXT: roll (%rdx) # sched: [8:1.00] +; SANDY-NEXT: rorl (%rdx) # sched: [8:1.00] ; SANDY-NEXT: roll $7, %edi # sched: [2:1.00] ; SANDY-NEXT: rorl $7, %edi # sched: [2:1.00] ; SANDY-NEXT: roll $7, (%rdx) # sched: [8:1.00] @@ -11620,10 +11620,10 @@ define void @test_rol_ror_64(i64 %a0, i64 %a1, i64 *%a2) optsize { ; GENERIC-LABEL: test_rol_ror_64: ; GENERIC: # %bb.0: ; GENERIC-NEXT: #APP -; GENERIC-NEXT: rolq %rdi # sched: [1:0.50] -; GENERIC-NEXT: rorq %rdi # sched: [1:0.50] -; GENERIC-NEXT: rolq (%rdx) # sched: [5:1.00] -; GENERIC-NEXT: rorq (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: rolq %rdi # sched: [2:1.00] +; GENERIC-NEXT: rorq %rdi # sched: [2:1.00] +; GENERIC-NEXT: rolq (%rdx) # sched: [8:1.00] +; GENERIC-NEXT: rorq (%rdx) # sched: [8:1.00] ; GENERIC-NEXT: rolq $7, %rdi # sched: [2:1.00] ; GENERIC-NEXT: rorq $7, %rdi # sched: [2:1.00] ; GENERIC-NEXT: rolq $7, (%rdx) # sched: [8:1.00] @@ -11674,10 +11674,10 @@ define void @test_rol_ror_64(i64 %a0, i64 %a1, i64 *%a2) optsize { ; SANDY-LABEL: test_rol_ror_64: ; SANDY: # %bb.0: ; SANDY-NEXT: #APP -; SANDY-NEXT: rolq %rdi # sched: [1:0.50] -; SANDY-NEXT: rorq %rdi # sched: [1:0.50] -; SANDY-NEXT: rolq (%rdx) # sched: [5:1.00] -; SANDY-NEXT: rorq (%rdx) # sched: [5:1.00] +; SANDY-NEXT: rolq %rdi # sched: [2:1.00] +; SANDY-NEXT: rorq %rdi # sched: [2:1.00] +; SANDY-NEXT: rolq (%rdx) # sched: [8:1.00] +; SANDY-NEXT: rorq (%rdx) # sched: [8:1.00] ; SANDY-NEXT: rolq $7, %rdi # sched: [2:1.00] ; SANDY-NEXT: rorq $7, %rdi # sched: [2:1.00] ; SANDY-NEXT: rolq $7, (%rdx) # sched: [8:1.00] @@ -11807,9 +11807,9 @@ define void @test_sar_shl_shr_8(i8 %a0, i8 %a1, i8 *%a2) optsize { ; GENERIC-NEXT: sarb %dil # sched: [1:0.50] ; GENERIC-NEXT: shlb %dil # sched: [1:0.50] ; GENERIC-NEXT: shrb %dil # sched: [1:0.50] -; GENERIC-NEXT: sarb (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: sarb (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: shlb (%rdx) # sched: [7:1.00] -; GENERIC-NEXT: shrb (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: shrb (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: sarb $7, %dil # sched: [1:0.50] ; GENERIC-NEXT: shlb $7, %dil # sched: [1:0.50] ; GENERIC-NEXT: shrb $7, %dil # sched: [1:0.50] @@ -11879,9 +11879,9 @@ define void @test_sar_shl_shr_8(i8 %a0, i8 %a1, i8 *%a2) optsize { ; SANDY-NEXT: sarb %dil # sched: [1:0.50] ; SANDY-NEXT: shlb %dil # sched: [1:0.50] ; SANDY-NEXT: shrb %dil # sched: [1:0.50] -; SANDY-NEXT: sarb (%rdx) # sched: [5:1.00] +; SANDY-NEXT: sarb (%rdx) # sched: [7:1.00] ; SANDY-NEXT: shlb (%rdx) # sched: [7:1.00] -; SANDY-NEXT: shrb (%rdx) # sched: [5:1.00] +; SANDY-NEXT: shrb (%rdx) # sched: [7:1.00] ; SANDY-NEXT: sarb $7, %dil # sched: [1:0.50] ; SANDY-NEXT: shlb $7, %dil # sched: [1:0.50] ; SANDY-NEXT: shrb $7, %dil # sched: [1:0.50] @@ -12050,9 +12050,9 @@ define void @test_sar_shl_shr_16(i16 %a0, i16 %a1, i16 *%a2) optsize { ; GENERIC-NEXT: sarw %di # sched: [1:0.50] ; GENERIC-NEXT: shlw %di # sched: [1:0.50] ; GENERIC-NEXT: shrw %di # sched: [1:0.50] -; GENERIC-NEXT: sarw (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: sarw (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: shlw (%rdx) # sched: [7:1.00] -; GENERIC-NEXT: shrw (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: shrw (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: sarw $7, %di # sched: [1:0.50] ; GENERIC-NEXT: shlw $7, %di # sched: [1:0.50] ; GENERIC-NEXT: shrw $7, %di # sched: [1:0.50] @@ -12122,9 +12122,9 @@ define void @test_sar_shl_shr_16(i16 %a0, i16 %a1, i16 *%a2) optsize { ; SANDY-NEXT: sarw %di # sched: [1:0.50] ; SANDY-NEXT: shlw %di # sched: [1:0.50] ; SANDY-NEXT: shrw %di # sched: [1:0.50] -; SANDY-NEXT: sarw (%rdx) # sched: [5:1.00] +; SANDY-NEXT: sarw (%rdx) # sched: [7:1.00] ; SANDY-NEXT: shlw (%rdx) # sched: [7:1.00] -; SANDY-NEXT: shrw (%rdx) # sched: [5:1.00] +; SANDY-NEXT: shrw (%rdx) # sched: [7:1.00] ; SANDY-NEXT: sarw $7, %di # sched: [1:0.50] ; SANDY-NEXT: shlw $7, %di # sched: [1:0.50] ; SANDY-NEXT: shrw $7, %di # sched: [1:0.50] @@ -12293,9 +12293,9 @@ define void @test_sar_shl_shr_32(i32 %a0, i32 %a1, i32 *%a2) optsize { ; GENERIC-NEXT: sarl %edi # sched: [1:0.50] ; GENERIC-NEXT: shll %edi # sched: [1:0.50] ; GENERIC-NEXT: shrl %edi # sched: [1:0.50] -; GENERIC-NEXT: sarl (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: sarl (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: shll (%rdx) # sched: [7:1.00] -; GENERIC-NEXT: shrl (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: shrl (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: sarl $7, %edi # sched: [1:0.50] ; GENERIC-NEXT: shll $7, %edi # sched: [1:0.50] ; GENERIC-NEXT: shrl $7, %edi # sched: [1:0.50] @@ -12365,9 +12365,9 @@ define void @test_sar_shl_shr_32(i32 %a0, i32 %a1, i32 *%a2) optsize { ; SANDY-NEXT: sarl %edi # sched: [1:0.50] ; SANDY-NEXT: shll %edi # sched: [1:0.50] ; SANDY-NEXT: shrl %edi # sched: [1:0.50] -; SANDY-NEXT: sarl (%rdx) # sched: [5:1.00] +; SANDY-NEXT: sarl (%rdx) # sched: [7:1.00] ; SANDY-NEXT: shll (%rdx) # sched: [7:1.00] -; SANDY-NEXT: shrl (%rdx) # sched: [5:1.00] +; SANDY-NEXT: shrl (%rdx) # sched: [7:1.00] ; SANDY-NEXT: sarl $7, %edi # sched: [1:0.50] ; SANDY-NEXT: shll $7, %edi # sched: [1:0.50] ; SANDY-NEXT: shrl $7, %edi # sched: [1:0.50] @@ -12536,9 +12536,9 @@ define void @test_sar_shl_shr_64(i64 %a0, i64 %a1, i64 *%a2) optsize { ; GENERIC-NEXT: sarq %rdi # sched: [1:0.50] ; GENERIC-NEXT: shlq %rdi # sched: [1:0.50] ; GENERIC-NEXT: shrq %rdi # sched: [1:0.50] -; GENERIC-NEXT: sarq (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: sarq (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: shlq (%rdx) # sched: [7:1.00] -; GENERIC-NEXT: shrq (%rdx) # sched: [5:1.00] +; GENERIC-NEXT: shrq (%rdx) # sched: [7:1.00] ; GENERIC-NEXT: sarq $7, %rdi # sched: [1:0.50] ; GENERIC-NEXT: shlq $7, %rdi # sched: [1:0.50] ; GENERIC-NEXT: shrq $7, %rdi # sched: [1:0.50] @@ -12608,9 +12608,9 @@ define void @test_sar_shl_shr_64(i64 %a0, i64 %a1, i64 *%a2) optsize { ; SANDY-NEXT: sarq %rdi # sched: [1:0.50] ; SANDY-NEXT: shlq %rdi # sched: [1:0.50] ; SANDY-NEXT: shrq %rdi # sched: [1:0.50] -; SANDY-NEXT: sarq (%rdx) # sched: [5:1.00] +; SANDY-NEXT: sarq (%rdx) # sched: [7:1.00] ; SANDY-NEXT: shlq (%rdx) # sched: [7:1.00] -; SANDY-NEXT: shrq (%rdx) # sched: [5:1.00] +; SANDY-NEXT: shrq (%rdx) # sched: [7:1.00] ; SANDY-NEXT: sarq $7, %rdi # sched: [1:0.50] ; SANDY-NEXT: shlq $7, %rdi # sched: [1:0.50] ; SANDY-NEXT: shrq $7, %rdi # sched: [1:0.50] -- 2.7.4