From 7c46a4883625a20691a78170f8da783dc9b8a9c6 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Wed, 20 Jan 2021 13:51:41 +0100 Subject: [PATCH] etnaviv: use new PE pipe address states on >= HALTI0 We used the number of pipes to determine which state registers to use for the PE pipe address configuration, as the dual pipe GPUs were the first one where those new states were used. Now there are some new single pipe GPUs where this logic breaks. HALTI0 added the new PE address states and all GPUs with at least this feature level are using the new states exclusively, even if they only have a single PE pipe. Signed-off-by: Lucas Stach Reviewed-by: Philipp Zabel Reviewed-by: Christian Gmeiner Part-of: --- src/gallium/drivers/etnaviv/etnaviv_emit.c | 12 +++++------- src/gallium/drivers/etnaviv/etnaviv_state.c | 23 +++++++++++++---------- 2 files changed, 18 insertions(+), 17 deletions(-) diff --git a/src/gallium/drivers/etnaviv/etnaviv_emit.c b/src/gallium/drivers/etnaviv/etnaviv_emit.c index a433d9d..84f8697 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_emit.c +++ b/src/gallium/drivers/etnaviv/etnaviv_emit.c @@ -440,7 +440,7 @@ etna_emit_state(struct etna_context *ctx) if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { /*0140C*/ EMIT_STATE(PE_DEPTH_NORMALIZE, ctx->framebuffer.PE_DEPTH_NORMALIZE); - if (screen->specs.pixel_pipes == 1) { + if (screen->specs.halti < 0) { /*01410*/ EMIT_STATE_RELOC(PE_DEPTH_ADDR, &ctx->framebuffer.PE_DEPTH_ADDR); } @@ -477,11 +477,7 @@ etna_emit_state(struct etna_context *ctx) /*0142C*/ EMIT_STATE(PE_COLOR_FORMAT, val); } if (unlikely(dirty & (ETNA_DIRTY_FRAMEBUFFER))) { - if (screen->specs.pixel_pipes == 1) { - /*01430*/ EMIT_STATE_RELOC(PE_COLOR_ADDR, &ctx->framebuffer.PE_COLOR_ADDR); - /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); - /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); - } else if (screen->specs.pixel_pipes == 2) { + if (screen->specs.halti >= 0) { /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); /*01460*/ EMIT_STATE_RELOC(PE_PIPE_COLOR_ADDR(0), &ctx->framebuffer.PE_PIPE_COLOR_ADDR[0]); @@ -489,7 +485,9 @@ etna_emit_state(struct etna_context *ctx) /*01480*/ EMIT_STATE_RELOC(PE_PIPE_DEPTH_ADDR(0), &ctx->framebuffer.PE_PIPE_DEPTH_ADDR[0]); /*01484*/ EMIT_STATE_RELOC(PE_PIPE_DEPTH_ADDR(1), &ctx->framebuffer.PE_PIPE_DEPTH_ADDR[1]); } else { - abort(); + /*01430*/ EMIT_STATE_RELOC(PE_COLOR_ADDR, &ctx->framebuffer.PE_COLOR_ADDR); + /*01434*/ EMIT_STATE(PE_COLOR_STRIDE, ctx->framebuffer.PE_COLOR_STRIDE); + /*01454*/ EMIT_STATE(PE_HDEPTH_CONTROL, ctx->framebuffer.PE_HDEPTH_CONTROL); } } if (unlikely(dirty & (ETNA_DIRTY_STENCIL_REF | ETNA_DIRTY_RASTERIZER | ETNA_DIRTY_ZSA))) { diff --git a/src/gallium/drivers/etnaviv/etnaviv_state.c b/src/gallium/drivers/etnaviv/etnaviv_state.c index 1ad8397..0c63c8f 100644 --- a/src/gallium/drivers/etnaviv/etnaviv_state.c +++ b/src/gallium/drivers/etnaviv/etnaviv_state.c @@ -176,17 +176,20 @@ etna_set_framebuffer_state(struct pipe_context *pctx, cbuf->surf.offset, cbuf->surf.stride * 4); } - if (screen->specs.pixel_pipes == 1) { - cs->PE_COLOR_ADDR = cbuf->reloc[0]; - cs->PE_COLOR_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; - } else { - /* Rendered textures must always be multi-tiled, or single-buffer mode must be supported */ - assert((res->layout & ETNA_LAYOUT_BIT_MULTI) || screen->specs.single_buffer); + if (screen->specs.halti >= 0) { + /* Rendertargets on GPUs with more than a single pixel pipe must always + * be multi-tiled, or single-buffer mode must be supported */ + assert(screen->specs.pixel_pipes == 1 || + (res->layout & ETNA_LAYOUT_BIT_MULTI) || screen->specs.single_buffer); for (int i = 0; i < screen->specs.pixel_pipes; i++) { cs->PE_PIPE_COLOR_ADDR[i] = cbuf->reloc[i]; cs->PE_PIPE_COLOR_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } + } else { + cs->PE_COLOR_ADDR = cbuf->reloc[0]; + cs->PE_COLOR_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } + cs->PE_COLOR_STRIDE = cbuf->surf.stride; if (cbuf->surf.ts_size) { @@ -255,14 +258,14 @@ etna_set_framebuffer_state(struct pipe_context *pctx, /* VIVS_PE_DEPTH_CONFIG_ONLY_DEPTH */ /* merged with depth_stencil_alpha */ - if (screen->specs.pixel_pipes == 1) { - cs->PE_DEPTH_ADDR = zsbuf->reloc[0]; - cs->PE_DEPTH_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; - } else { + if (screen->specs.halti >= 0) { for (int i = 0; i < screen->specs.pixel_pipes; i++) { cs->PE_PIPE_DEPTH_ADDR[i] = zsbuf->reloc[i]; cs->PE_PIPE_DEPTH_ADDR[i].flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } + } else { + cs->PE_DEPTH_ADDR = zsbuf->reloc[0]; + cs->PE_DEPTH_ADDR.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE; } cs->PE_DEPTH_STRIDE = zsbuf->surf.stride; -- 2.7.4