From 7b646a6d12a67416587630381eb77f16ce6d33e2 Mon Sep 17 00:00:00 2001 From: Simon Schwarz Date: Wed, 28 Sep 2011 05:00:25 +0000 Subject: [PATCH] omap3: Add DMA register accessors Adding the register definitions for omap3 DMA controller to cpu.h Signed-off-by: Simon Schwarz Signed-off-by: Sandeep Paulraj --- arch/arm/include/asm/arch-omap3/cpu.h | 45 +++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/arch/arm/include/asm/arch-omap3/cpu.h b/arch/arm/include/asm/arch-omap3/cpu.h index 08a725d..2c93e8f 100644 --- a/arch/arm/include/asm/arch-omap3/cpu.h +++ b/arch/arm/include/asm/arch-omap3/cpu.h @@ -282,6 +282,51 @@ typedef struct emif4 { #define SMART_IDLE (0x2 << 3) #define REF_ON_IDLE (0x1 << 6) +/* DMA */ +#ifndef __KERNEL_STRICT_NAMES +#ifndef __ASSEMBLY__ +struct dma4_chan { + u32 ccr; + u32 clnk_ctrl; + u32 cicr; + u32 csr; + u32 csdp; + u32 cen; + u32 cfn; + u32 cssa; + u32 cdsa; + u32 csel; + u32 csfl; + u32 cdel; + u32 cdfl; + u32 csac; + u32 cdac; + u32 ccen; + u32 ccfn; + u32 color; +}; + +struct dma4 { + u32 revision; + u8 res1[0x4]; + u32 irqstatus_l[0x4]; + u32 irqenable_l[0x4]; + u32 sysstatus; + u32 ocp_sysconfig; + u8 res2[0x34]; + u32 caps_0; + u8 res3[0x4]; + u32 caps_2; + u32 caps_3; + u32 caps_4; + u32 gcr; + u8 res4[0x4]; + struct dma4_chan chan[32]; +}; + +#endif /*__ASSEMBLY__ */ +#endif /* __KERNEL_STRICT_NAMES */ + /* timer regs offsets (32 bit regs) */ #ifndef __KERNEL_STRICT_NAMES -- 2.7.4