From 7a98ba2eb45f37f6c05623c183282dd02f532329 Mon Sep 17 00:00:00 2001 From: "Steve MacLean, Qualcomm Datacenter Technologies, Inc" Date: Wed, 22 Feb 2017 22:11:45 +0000 Subject: [PATCH] [Arm64] Fix genCodeForCpObj() CORINFO_HELP_ASSIGN_BYREF is the functional equivalent to *dst = *src; ++dst; ++src; Note: Description ignores barriers. Since src and dst are incremented the registers are marked dead. In genCodeForCpObj(), the incremented values are will be reused and therefore must be treated as live. Add code to explicitly force them live for this use case. Commit migrated from https://github.com/dotnet/coreclr/commit/a5d464837248bae64845fb3e8207821d29f316d8 --- src/coreclr/src/jit/codegenarm64.cpp | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/coreclr/src/jit/codegenarm64.cpp b/src/coreclr/src/jit/codegenarm64.cpp index 48d6f76..7cc9622 100644 --- a/src/coreclr/src/jit/codegenarm64.cpp +++ b/src/coreclr/src/jit/codegenarm64.cpp @@ -3626,8 +3626,14 @@ void CodeGen::genCodeForCpObj(GenTreeObj* cpObjNode) break; default: - // We have a GC pointer, call the memory barrier. + // In the case of a GC-Pointer we'll call the ByRef write barrier helper genEmitHelperCall(CORINFO_HELP_ASSIGN_BYREF, 0, EA_PTRSIZE); + + // genEmitHelperCall(CORINFO_HELP_ASSIGN_BYREF...) killed these registers. + // However they are still live references to the structures we are copying. + gcInfo.gcMarkRegPtrVal(REG_WRITE_BARRIER_SRC_BYREF, TYP_BYREF); + gcInfo.gcMarkRegPtrVal(REG_WRITE_BARRIER_DST_BYREF, TYP_BYREF); + gcPtrCount--; break; } -- 2.7.4