From 7a83b391c734e5e64487ddd8813470a5814b4868 Mon Sep 17 00:00:00 2001 From: Kelvin Nilsen Date: Wed, 26 Oct 2016 20:19:39 +0000 Subject: [PATCH] re PR target/78056 (build failure on Power7) gcc/ChangeLog: 2016-10-26 Kelvin Nilsen PR target/78056 * config/rs6000/rs6000.c (spe_init_builtins): Modify loops to not define builtin functions from the bdesc_spe_predicates or bdesc_spe_evsel arrays if the builtin mask is not compatible with the current compiler configuration. (paired_init_builtins): Modify loop to not define define builtin functions from the bdesc_paried_preds array if the builtin mask is not compatible with the current compiler configuration. (altivec_init_builtins): Modify loops to not define the __builtin_altivec_stxvl function nor the builtin functions from the bdesc_dst or bdesc_altivec_preds, or bdesc_abs arrays if the builtin mask is not compatible with the current compiler configuration. gcc/testsuite/ChangeLog: 2016-10-26 Kelvin Nilsen PR target/78056 * gcc.target/powerpc/vsu/vec-any-eqz-7.c (test_any_equal): Change expected error message. * gcc.target/powerpc/vsu/vec-xst-len-12.c (store_data): Change expected error message. * gcc.target/powerpc/vsu/vec-all-nez-7.c (test_all_not_equal_and_not_zero): Change expected error message. From-SVN: r241599 --- gcc/ChangeLog | 16 ++++++ gcc/config/rs6000/rs6000.c | 66 +++++++++++++++++++++- gcc/testsuite/ChangeLog | 10 ++++ .../gcc.target/powerpc/vsu/vec-all-nez-7.c | 2 +- .../gcc.target/powerpc/vsu/vec-any-eqz-7.c | 2 +- .../gcc.target/powerpc/vsu/vec-xst-len-12.c | 2 +- 6 files changed, 92 insertions(+), 6 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 3e7704c..bc87d16 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,19 @@ +2016-10-26 Kelvin Nilsen + + PR target/78056 + * config/rs6000/rs6000.c (spe_init_builtins): Modify loops to not + define builtin functions from the bdesc_spe_predicates or + bdesc_spe_evsel arrays if the builtin mask is not compatible with + the current compiler configuration. + (paired_init_builtins): Modify loop to not define define builtin + functions from the bdesc_paried_preds array if the builtin mask is + not compatible with the current compiler configuration. + (altivec_init_builtins): Modify loops to not define the + __builtin_altivec_stxvl function nor the builtin functions from + the bdesc_dst or bdesc_altivec_preds, or bdesc_abs arrays if the + builtin mask is not compatible with the current compiler + configuration. + 2016-10-26 Jeff Law * config/mips/mips.c (mips16_constant_cost): Add missing diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 654206f..5e35e33 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -16923,6 +16923,7 @@ spe_init_builtins (void) tree pushort_type_node = build_pointer_type (short_unsigned_type_node); const struct builtin_description *d; size_t i; + HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; tree v2si_ftype_4_v2si = build_function_type_list (opaque_V2SI_type_node, @@ -17063,6 +17064,15 @@ spe_init_builtins (void) for (i = 0; i < ARRAY_SIZE (bdesc_spe_predicates); ++i, d++) { tree type; + HOST_WIDE_INT mask = d->mask; + + if ((mask & builtin_mask) != mask) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "spe_init_builtins, skip predicate %s\n", + d->name); + continue; + } switch (insn_data[d->icode].operand[1].mode) { @@ -17084,6 +17094,15 @@ spe_init_builtins (void) for (i = 0; i < ARRAY_SIZE (bdesc_spe_evsel); ++i, d++) { tree type; + HOST_WIDE_INT mask = d->mask; + + if ((mask & builtin_mask) != mask) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "spe_init_builtins, skip evsel %s\n", + d->name); + continue; + } switch (insn_data[d->icode].operand[1].mode) { @@ -17106,6 +17125,7 @@ paired_init_builtins (void) { const struct builtin_description *d; size_t i; + HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; tree int_ftype_int_v2sf_v2sf = build_function_type_list (integer_type_node, @@ -17141,6 +17161,15 @@ paired_init_builtins (void) for (i = 0; i < ARRAY_SIZE (bdesc_paired_preds); ++i, d++) { tree type; + HOST_WIDE_INT mask = d->mask; + + if ((mask & builtin_mask) != mask) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "paired_init_builtins, skip predicate %s\n", + d->name); + continue; + } if (TARGET_DEBUG_BUILTIN) fprintf (stderr, "paired pred #%d, insn = %s [%d], mode = %s\n", @@ -17167,6 +17196,7 @@ altivec_init_builtins (void) size_t i; tree ftype; tree decl; + HOST_WIDE_INT builtin_mask = rs6000_builtin_mask; tree pvoid_type_node = build_pointer_type (void_type_node); @@ -17500,13 +17530,25 @@ altivec_init_builtins (void) def_builtin ("__builtin_vec_stvrx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_VEC_STVRX); def_builtin ("__builtin_vec_stvrxl", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_VEC_STVRXL); - def_builtin ("__builtin_altivec_stxvl", void_ftype_v16qi_pvoid_long, - P9V_BUILTIN_STXVL); + if (TARGET_P9_VECTOR) + def_builtin ("__builtin_altivec_stxvl", void_ftype_v16qi_pvoid_long, + P9V_BUILTIN_STXVL); /* Add the DST variants. */ d = bdesc_dst; for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++) - def_builtin (d->name, void_ftype_pcvoid_int_int, d->code); + { + HOST_WIDE_INT mask = d->mask; + + if ((mask & builtin_mask) != mask) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "altivec_init_builtins, skip dst %s\n", + d->name); + continue; + } + def_builtin (d->name, void_ftype_pcvoid_int_int, d->code); + } /* Initialize the predicates. */ d = bdesc_altivec_preds; @@ -17514,6 +17556,15 @@ altivec_init_builtins (void) { machine_mode mode1; tree type; + HOST_WIDE_INT mask = d->mask; + + if ((mask & builtin_mask) != mask) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "altivec_init_builtins, skip predicate %s\n", + d->name); + continue; + } if (rs6000_overloaded_builtin_p (d->code)) mode1 = VOIDmode; @@ -17556,6 +17607,15 @@ altivec_init_builtins (void) { machine_mode mode0; tree type; + HOST_WIDE_INT mask = d->mask; + + if ((mask & builtin_mask) != mask) + { + if (TARGET_DEBUG_BUILTIN) + fprintf (stderr, "altivec_init_builtins, skip abs %s\n", + d->name); + continue; + } mode0 = insn_data[d->icode].operand[0].mode; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 0ceb8d1..8e3e49f 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,13 @@ +2016-10-26 Kelvin Nilsen + + PR target/78056 + * gcc.target/powerpc/vsu/vec-any-eqz-7.c (test_any_equal): Change + expected error message. + * gcc.target/powerpc/vsu/vec-xst-len-12.c (store_data): Change + expected error message. + * gcc.target/powerpc/vsu/vec-all-nez-7.c + (test_all_not_equal_and_not_zero): Change expected error message. + 2016-10-26 Jakub Jelinek PR fortran/77973 diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c index 0939861..8f8271f 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-all-nez-7.c @@ -12,5 +12,5 @@ test_all_not_equal_and_not_zero (vector unsigned short *arg1_p, vector unsigned short arg_1 = *arg1_p; vector unsigned short arg_2 = *arg2_p; - return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); /* { dg-error "Builtin function __builtin_altivec_vcmpnezh_p requires" } */ + return __builtin_vec_vcmpnez_p (__CR6_LT, arg_1, arg_2); /* { dg-error "Builtin function __builtin_vec_vcmpnez_p not supported in this compiler configuration" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c index 6ea69ec..7b2d4dd 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-any-eqz-7.c @@ -11,5 +11,5 @@ test_any_equal (vector unsigned int *arg1_p, vector unsigned int *arg2_p) vector unsigned int arg_1 = *arg1_p; vector unsigned int arg_2 = *arg2_p; - return __builtin_vec_vcmpnez_p (__CR6_LT_REV, arg_1, arg_2); /* { dg-error "Builtin function __builtin_altivec_vcmpnezw_p requires" } */ + return __builtin_vec_vcmpnez_p (__CR6_LT_REV, arg_1, arg_2); /* { dg-error "Builtin function __builtin_vec_vcmpnez_p not supported in this compiler configuration" } */ } diff --git a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-12.c b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-12.c index ad8fa70..42fe2c6 100644 --- a/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-12.c +++ b/gcc/testsuite/gcc.target/powerpc/vsu/vec-xst-len-12.c @@ -14,5 +14,5 @@ store_data (vector double *datap, double *address, size_t length) { vector double data = *datap; - __builtin_vec_stxvl (data, address, length); /* { dg-error "Builtin function __builtin_altivec_stxvl requires" } */ + __builtin_vec_stxvl (data, address, length); /* { dg-error "Builtin function __builtin_vec_stxvl not supported in this compiler configuration" } */ } -- 2.7.4