From 79fc8ffe6cd6e4b23c797e166ea3b0c1c0703c29 Mon Sep 17 00:00:00 2001 From: Andrew Senkevich Date: Tue, 10 Jan 2017 12:55:41 +0000 Subject: [PATCH] Enable AVX-512 VPOPCNTD/VPOPCNTQ instructions. gcc/ * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET, OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET): New. * config.gcc: Add avx512vpopcntdqintrin.h. * config/i386/avx512vpopcntdqintrin.h: New. * config/i386/cpuid.h (bit_AVX512VPOPCNTDQ): New. * config/i386/i386-builtin-types.def: Add new types. * config/i386/i386-builtin.def (__builtin_ia32_vpopcountd_v16si, __builtin_ia32_vpopcountd_v16si_mask, __builtin_ia32_vpopcountq_v8di, __builtin_ia32_vpopcountq_v8di_mask): New. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AVX512VPOPCNTDQ__. * config/i386/i386.c (ix86_target_string): Add -mavx512vpopcntdq. (PTA_AVX512VPOPCNTDQ): Define. * config/i386/i386.h (TARGET_AVX512VPOPCNTDQ, TARGET_AVX512VPOPCNTDQ_P): Define. * config/i386/i386.opt: Add mavx512vpopcntdq. * config/i386/immintrin.h: Include avx512vpopcntdqintrin.h. * config/i386/sse.md (define_insn "vpopcount"): New. libgcc/ * config/i386/cpuinfo.h (processor_features): Add FEATURE_AVX512VPOPCNTDQ. * config/i386/cpuinfo.c (get_available_features): Habdle new feature. gcc/testsuite/ * g++.dg/other/i386-2.C: Add -mavx512vpopcntdq. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/builtin_target.c: Handle new option. * gcc.target/i386/funcspec-56.inc: Test new attributes. * gcc.target/i386/avx512vpopcntdq-vpopcntd.c: New test. * gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto. From-SVN: r244263 --- gcc/ChangeLog | 21 +++++ gcc/common/config/i386/i386-common.c | 19 +++++ gcc/config.gcc | 6 +- gcc/config/i386/avx512vpopcntdqintrin.h | 94 ++++++++++++++++++++++ gcc/config/i386/cpuid.h | 1 + gcc/config/i386/i386-builtin-types.def | 2 + gcc/config/i386/i386-builtin.def | 4 + gcc/config/i386/i386-c.c | 2 + gcc/config/i386/i386.c | 10 +++ gcc/config/i386/i386.h | 2 + gcc/config/i386/i386.opt | 4 + gcc/config/i386/immintrin.h | 2 + gcc/config/i386/sse.md | 7 ++ gcc/testsuite/ChangeLog | 13 +++ gcc/testsuite/g++.dg/other/i386-2.C | 6 +- gcc/testsuite/g++.dg/other/i386-3.C | 6 +- .../gcc.target/i386/avx512vpopcntdq-vpopcntd.c | 20 +++++ .../gcc.target/i386/avx512vpopcntdq-vpopcntq.c | 20 +++++ gcc/testsuite/gcc.target/i386/builtin_target.c | 4 + gcc/testsuite/gcc.target/i386/funcspec-56.inc | 2 + gcc/testsuite/gcc.target/i386/sse-12.c | 2 +- gcc/testsuite/gcc.target/i386/sse-13.c | 2 +- gcc/testsuite/gcc.target/i386/sse-22.c | 8 +- gcc/testsuite/gcc.target/i386/sse-23.c | 6 +- libgcc/ChangeLog | 7 ++ libgcc/config/i386/cpuinfo.c | 2 + libgcc/config/i386/cpuinfo.h | 3 +- 27 files changed, 257 insertions(+), 18 deletions(-) create mode 100644 gcc/config/i386/avx512vpopcntdqintrin.h create mode 100644 gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c create mode 100644 gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4878272..ba1dfa9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,24 @@ +2017-01-10 Andrew Senkevich + + * common/config/i386/i386-common.c (OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET, + OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET): New. + * config.gcc: Add avx512vpopcntdqintrin.h. + * config/i386/avx512vpopcntdqintrin.h: New. + * config/i386/cpuid.h (bit_AVX512VPOPCNTDQ): New. + * config/i386/i386-builtin-types.def: Add new types. + * config/i386/i386-builtin.def (__builtin_ia32_vpopcountd_v16si, + __builtin_ia32_vpopcountd_v16si_mask, __builtin_ia32_vpopcountq_v8di, + __builtin_ia32_vpopcountq_v8di_mask): New. + * config/i386/i386-c.c (ix86_target_macros_internal): Define + __AVX512VPOPCNTDQ__. + * config/i386/i386.c (ix86_target_string): Add -mavx512vpopcntdq. + (PTA_AVX512VPOPCNTDQ): Define. + * config/i386/i386.h (TARGET_AVX512VPOPCNTDQ, + TARGET_AVX512VPOPCNTDQ_P): Define. + * config/i386/i386.opt: Add mavx512vpopcntdq. + * config/i386/immintrin.h: Include avx512vpopcntdqintrin.h. + * config/i386/sse.md (define_insn "vpopcount"): New. + 2017-01-01 Jan Hubicka PR middle-end/77484 diff --git a/gcc/common/config/i386/i386-common.c b/gcc/common/config/i386/i386-common.c index d1f82fd..4152ef8 100644 --- a/gcc/common/config/i386/i386-common.c +++ b/gcc/common/config/i386/i386-common.c @@ -78,6 +78,7 @@ along with GCC; see the file COPYING3. If not see (OPTION_MASK_ISA_AVX512VBMI | OPTION_MASK_ISA_AVX512BW_SET) #define OPTION_MASK_ISA_AVX5124FMAPS_SET OPTION_MASK_ISA_AVX5124FMAPS #define OPTION_MASK_ISA_AVX5124VNNIW_SET OPTION_MASK_ISA_AVX5124VNNIW +#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET OPTION_MASK_ISA_AVX512VPOPCNTDQ #define OPTION_MASK_ISA_RTM_SET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_PRFCHW_SET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_RDSEED_SET OPTION_MASK_ISA_RDSEED @@ -183,6 +184,7 @@ along with GCC; see the file COPYING3. If not see #define OPTION_MASK_ISA_AVX512VBMI_UNSET OPTION_MASK_ISA_AVX512VBMI #define OPTION_MASK_ISA_AVX5124FMAPS_UNSET OPTION_MASK_ISA_AVX5124FMAPS #define OPTION_MASK_ISA_AVX5124VNNIW_UNSET OPTION_MASK_ISA_AVX5124VNNIW +#define OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET OPTION_MASK_ISA_AVX512VPOPCNTDQ #define OPTION_MASK_ISA_RTM_UNSET OPTION_MASK_ISA_RTM #define OPTION_MASK_ISA_PRFCHW_UNSET OPTION_MASK_ISA_PRFCHW #define OPTION_MASK_ISA_RDSEED_UNSET OPTION_MASK_ISA_RDSEED @@ -409,6 +411,8 @@ ix86_handle_option (struct gcc_options *opts, opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124FMAPS_UNSET; opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX5124VNNIW_UNSET; opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX5124VNNIW_UNSET; + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET; } return true; @@ -481,6 +485,21 @@ ix86_handle_option (struct gcc_options *opts, } return true; + case OPT_mavx512vpopcntdq: + if (value) + { + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_SET; + opts->x_ix86_isa_flags |= OPTION_MASK_ISA_AVX512F_SET; + opts->x_ix86_isa_flags_explicit |= OPTION_MASK_ISA_AVX512F_SET; + } + else + { + opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET; + opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_AVX512VPOPCNTDQ_UNSET; + } + return true; + case OPT_mavx512dq: if (value) { diff --git a/gcc/config.gcc b/gcc/config.gcc index 7c27546..bb25d54 100644 --- a/gcc/config.gcc +++ b/gcc/config.gcc @@ -375,7 +375,8 @@ i[34567]86-*-*) avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h avx512vbmivlintrin.h avx5124fmapsintrin.h avx5124vnniwintrin.h - clwbintrin.h mwaitxintrin.h clzerointrin.h pkuintrin.h" + avx512vpopcntdqintrin.h clwbintrin.h mwaitxintrin.h + clzerointrin.h pkuintrin.h" ;; x86_64-*-*) cpu_type=i386 @@ -397,7 +398,8 @@ x86_64-*-*) avx512vlintrin.h avx512vlbwintrin.h avx512vldqintrin.h avx512ifmaintrin.h avx512ifmavlintrin.h avx512vbmiintrin.h avx512vbmivlintrin.h avx5124fmapsintrin.h avx5124vnniwintrin.h - clwbintrin.h mwaitxintrin.h clzerointrin.h pkuintrin.h" + avx512vpopcntdqintrin.h clwbintrin.h mwaitxintrin.h + clzerointrin.h pkuintrin.h" ;; ia64-*-*) extra_headers=ia64intrin.h diff --git a/gcc/config/i386/avx512vpopcntdqintrin.h b/gcc/config/i386/avx512vpopcntdqintrin.h new file mode 100644 index 0000000..9b0bc1b --- /dev/null +++ b/gcc/config/i386/avx512vpopcntdqintrin.h @@ -0,0 +1,94 @@ +/* Copyright (C) 2017 Free Software Foundation, Inc. + + This file is part of GCC. + + GCC is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. + + GCC is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +#if !defined _IMMINTRIN_H_INCLUDED +# error "Never use directly; include instead." +#endif + +#ifndef _AVX512VPOPCNTDQINTRIN_H_INCLUDED +#define _AVX512VPOPCNTDQINTRIN_H_INCLUDED + +#ifndef __AVX512VPOPCNTDQ__ +#pragma GCC push_options +#pragma GCC target("avx512vpopcntdq") +#define __DISABLE_AVX512VPOPCNTDQ__ +#endif /* __AVX512VPOPCNTDQ__ */ + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_popcnt_epi32 (__m512i __A) +{ + return (__m512i) __builtin_ia32_vpopcountd_v16si ((__v16si) __A); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_popcnt_epi32 (__m512i __A, __mmask16 __U, __m512i __B) +{ + return (__m512i) __builtin_ia32_vpopcountd_v16si_mask ((__v16si) __A, + (__v16si) __B, + (__mmask16) __U); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_maskz_popcnt_epi32 (__mmask16 __U, __m512i __A) +{ + return (__m512i) __builtin_ia32_vpopcountd_v16si_mask ((__v16si) __A, + (__v16si) + _mm512_setzero_si512 (), + (__mmask16) __U); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_popcnt_epi64 (__m512i __A) +{ + return (__m512i) __builtin_ia32_vpopcountq_v8di ((__v8di) __A); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_popcnt_epi64 (__m512i __A, __mmask8 __U, __m512i __B) +{ + return (__m512i) __builtin_ia32_vpopcountq_v8di_mask ((__v8di) __A, + (__v8di) __B, + (__mmask8) __U); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_maskz_popcnt_epi64 (__mmask8 __U, __m512i __A) +{ + return (__m512i) __builtin_ia32_vpopcountq_v8di_mask ((__v8di) __A, + (__v8di) + _mm512_setzero_si512 (), + (__mmask8) __U); +} + +#ifdef __DISABLE_AVX512VPOPCNTDQ__ +#undef __DISABLE_AVX512VPOPCNTDQ__ +#pragma GCC pop_options +#endif /* __DISABLE_AVX512VPOPCNTDQ__ */ + +#endif /* _AVX512VPOPCNTDQINTRIN_H_INCLUDED */ diff --git a/gcc/config/i386/cpuid.h b/gcc/config/i386/cpuid.h index fdd7e15..4bdc19e 100644 --- a/gcc/config/i386/cpuid.h +++ b/gcc/config/i386/cpuid.h @@ -54,6 +54,7 @@ #define bit_SSE4a (1 << 6) #define bit_PRFCHW (1 << 8) #define bit_XOP (1 << 11) +#define bit_AVX512VPOPCNTDQ (1 << 14) #define bit_LWP (1 << 15) #define bit_FMA4 (1 << 16) #define bit_TBM (1 << 21) diff --git a/gcc/config/i386/i386-builtin-types.def b/gcc/config/i386/i386-builtin-types.def index 6e938eb..18b3d4c 100644 --- a/gcc/config/i386/i386-builtin-types.def +++ b/gcc/config/i386/i386-builtin-types.def @@ -305,9 +305,11 @@ DEF_FUNCTION_TYPE (V8DF, V2DF) DEF_FUNCTION_TYPE (V16SI, V4SI) DEF_FUNCTION_TYPE (V16SI, V8SI) DEF_FUNCTION_TYPE (V16SI, V16SF) +DEF_FUNCTION_TYPE (V16SI, V16SI) DEF_FUNCTION_TYPE (V16SI, V16SI, V16SI, UHI) DEF_FUNCTION_TYPE (V8DI, V8DI, V8DI, UQI) DEF_FUNCTION_TYPE (V8DI, PV8DI) +DEF_FUNCTION_TYPE (V8DI, V8DI) DEF_FUNCTION_TYPE (DI, V2DI, INT) DEF_FUNCTION_TYPE (DOUBLE, V2DF, INT) diff --git a/gcc/config/i386/i386-builtin.def b/gcc/config/i386/i386-builtin.def index 48063d1..c351335 100644 --- a/gcc/config/i386/i386-builtin.def +++ b/gcc/config/i386/i386-builtin.def @@ -2527,6 +2527,10 @@ BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd, "__builtin BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssd_mask, "__builtin_ia32_vp4dpwssd_mask", IX86_BUILTIN_4DPWSSD_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI) BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds, "__builtin_ia32_vp4dpwssds", IX86_BUILTIN_4DPWSSDS, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI) BDESC (OPTION_MASK_ISA_AVX5124VNNIW, CODE_FOR_avx5124vnniw_vp4dpwssds_mask, "__builtin_ia32_vp4dpwssds_mask", IX86_BUILTIN_4DPWSSDS_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_V16SI_V16SI_V16SI_PCV4SI_V16SI_UHI) +BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv16si, "__builtin_ia32_vpopcountd_v16si", IX86_BUILTIN_VPOPCOUNTDV16SI, UNKNOWN, (int) V16SI_FTYPE_V16SI) +BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv16si_mask, "__builtin_ia32_vpopcountd_v16si_mask", IX86_BUILTIN_VPOPCOUNTDV16SI_MASK, UNKNOWN, (int) V16SI_FTYPE_V16SI_V16SI_UHI) +BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv8di, "__builtin_ia32_vpopcountq_v8di", IX86_BUILTIN_VPOPCOUNTQV8DI, UNKNOWN, (int) V8DI_FTYPE_V8DI) +BDESC (OPTION_MASK_ISA_AVX512VPOPCNTDQ, CODE_FOR_vpopcountv8di_mask, "__builtin_ia32_vpopcountq_v8di_mask", IX86_BUILTIN_VPOPCOUNTQV8DI_MASK, UNKNOWN, (int) V8DI_FTYPE_V8DI_V8DI_UQI) BDESC_END (ARGS2, MPX) diff --git a/gcc/config/i386/i386-c.c b/gcc/config/i386/i386-c.c index f633a2e..855ff79 100644 --- a/gcc/config/i386/i386-c.c +++ b/gcc/config/i386/i386-c.c @@ -380,6 +380,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag, def_or_undef (parse_in, "__AVX5124VNNIW__"); if (isa_flag2 & OPTION_MASK_ISA_AVX5124FMAPS) def_or_undef (parse_in, "__AVX5124FMAPS__"); + if (isa_flag2 & OPTION_MASK_ISA_AVX512VPOPCNTDQ) + def_or_undef (parse_in, "__AVX512VPOPCNTDQ__"); if (isa_flag & OPTION_MASK_ISA_FMA) def_or_undef (parse_in, "__FMA__"); if (isa_flag & OPTION_MASK_ISA_RTM) diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index b173b89..e03dadd 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -4320,6 +4320,7 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2, int flags, { { "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW }, { "-mavx5124fmaps", OPTION_MASK_ISA_AVX5124FMAPS }, + { "-mavx512vpopcntdq", OPTION_MASK_ISA_AVX512VPOPCNTDQ }, }; /* Flag options. */ static struct ix86_target_opts flag_opts[] = @@ -4919,6 +4920,7 @@ ix86_option_override_internal (bool main_args_p, #define PTA_PKU (HOST_WIDE_INT_1 << 59) #define PTA_AVX5124VNNIW (HOST_WIDE_INT_1 << 60) #define PTA_AVX5124FMAPS (HOST_WIDE_INT_1 << 61) +#define PTA_AVX512VPOPCNTDQ (HOST_WIDE_INT_1 << 62) #define PTA_CORE2 \ (PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_SSSE3 \ @@ -5581,6 +5583,9 @@ ix86_option_override_internal (bool main_args_p, if (processor_alias_table[i].flags & PTA_AVX5124FMAPS && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_AVX5124FMAPS)) opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX5124FMAPS; + if (processor_alias_table[i].flags & PTA_AVX512VPOPCNTDQ + && !(opts->x_ix86_isa_flags2_explicit & OPTION_MASK_ISA_AVX512VPOPCNTDQ)) + opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_AVX512VPOPCNTDQ; if (processor_alias_table[i].flags & (PTA_PREFETCH_SSE | PTA_SSE)) x86_prefetch_sse = true; @@ -6625,6 +6630,7 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[], IX86_ATTR_ISA ("avx512vl", OPT_mavx512vl), IX86_ATTR_ISA ("avx5124fmaps", OPT_mavx5124fmaps), IX86_ATTR_ISA ("avx5124vnniw", OPT_mavx5124vnniw), + IX86_ATTR_ISA ("avx512vpopcntdq", OPT_mavx512vpopcntdq), IX86_ATTR_ISA ("mmx", OPT_mmmx), IX86_ATTR_ISA ("pclmul", OPT_mpclmul), IX86_ATTR_ISA ("popcnt", OPT_mpopcnt), @@ -33300,6 +33306,7 @@ fold_builtin_cpu (tree fndecl, tree *args) F_AVX512IFMA, F_AVX5124VNNIW, F_AVX5124FMAPS, + F_AVX512VPOPCNTDQ, F_MAX }; @@ -33414,6 +33421,7 @@ fold_builtin_cpu (tree fndecl, tree *args) {"avx512ifma",F_AVX512IFMA}, {"avx5124vnniw",F_AVX5124VNNIW}, {"avx5124fmaps",F_AVX5124FMAPS}, + {"avx512vpopcntdq",F_AVX512VPOPCNTDQ}, }; tree __processor_model_type = build_processor_model_struct (); @@ -34891,8 +34899,10 @@ ix86_expand_args_builtin (const struct builtin_description *d, case V16SF_FTYPE_V4SF: case V16SI_FTYPE_V4SI: case V16SI_FTYPE_V16SF: + case V16SI_FTYPE_V16SI: case V16SF_FTYPE_V16SF: case V8DI_FTYPE_UQI: + case V8DI_FTYPE_V8DI: case V8DF_FTYPE_V4DF: case V8DF_FTYPE_V2DF: case V8DF_FTYPE_V8DF: diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index e6f9a75..a7d5f96 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -85,6 +85,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define TARGET_AVX5124FMAPS_P(x) TARGET_ISA_AVX5124FMAPS_P(x) #define TARGET_AVX5124VNNIW TARGET_ISA_AVX5124VNNIW #define TARGET_AVX5124VNNIW_P(x) TARGET_ISA_AVX5124VNNIW_P(x) +#define TARGET_AVX512VPOPCNTDQ TARGET_ISA_AVX512VPOPCNTDQ +#define TARGET_AVX512VPOPCNTDQ_P(x) TARGET_ISA_AVX512VPOPCNTDQ_P(x) #define TARGET_FMA TARGET_ISA_FMA #define TARGET_FMA_P(x) TARGET_ISA_FMA_P(x) #define TARGET_SSE4A TARGET_ISA_SSE4A diff --git a/gcc/config/i386/i386.opt b/gcc/config/i386/i386.opt index 530f46d..11948a8 100644 --- a/gcc/config/i386/i386.opt +++ b/gcc/config/i386/i386.opt @@ -705,6 +705,10 @@ mavx5124vnniw Target Report Mask(ISA_AVX5124VNNIW) Var(ix86_isa_flags2) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX5124VNNIW built-in functions and code generation. +mavx512vpopcntdq +Target Report Mask(ISA_AVX512VPOPCNTDQ) Var(ix86_isa_flags2) Save +Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX, AVX2, AVX512F and AVX512VPOPCNTDQ built-in functions and code generation. + mfma Target Report Mask(ISA_FMA) Var(ix86_isa_flags) Save Support MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AVX and FMA built-in functions and code generation. diff --git a/gcc/config/i386/immintrin.h b/gcc/config/i386/immintrin.h index 2436496..80dfefe 100644 --- a/gcc/config/i386/immintrin.h +++ b/gcc/config/i386/immintrin.h @@ -72,6 +72,8 @@ #include +#include + #include #include diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 32b4901..f754994 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -19875,3 +19875,10 @@ [(set_attr ("type") ("ssemuladd")) (set_attr ("prefix") ("evex")) (set_attr ("mode") ("TI"))]) + +(define_insn "vpopcount" + [(set (match_operand:VI48_512 0 "register_operand" "=v") + (popcount:VI48_512 + (match_operand:VI48_512 1 "nonimmediate_operand" "vm")))] + "TARGET_AVX512VPOPCNTDQ" + "vpopcnt\t{%1, %0|%0, %1}") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 1054e20..c00016d 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,16 @@ +2017-01-10 Andrew Senkevich + + * g++.dg/other/i386-2.C: Add -mavx512vpopcntdq. + * g++.dg/other/i386-3.C: Ditto. + * gcc.target/i386/sse-12.c: Ditto. + * gcc.target/i386/sse-13.c: Ditto. + * gcc.target/i386/sse-22.c: Ditto. + * gcc.target/i386/sse-23.c: Ditto. + * gcc.target/i386/builtin_target.c: Handle new option. + * gcc.target/i386/funcspec-56.inc: Test new attributes. + * gcc.target/i386/avx512vpopcntdq-vpopcntd.c: New test. + * gcc.target/i386/avx512vpopcntdq-vpopcntq.c: Ditto. + 2017-01-09 Martin Sebor PR testsuite/79036 diff --git a/gcc/testsuite/g++.dg/other/i386-2.C b/gcc/testsuite/g++.dg/other/i386-2.C index 701051d..ad9fb7c 100644 --- a/gcc/testsuite/g++.dg/other/i386-2.C +++ b/gcc/testsuite/g++.dg/other/i386-2.C @@ -1,11 +1,11 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */ +/* { dg-options "-O -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h, - avx5124vnniwintrin.h and mm_malloc.h.h are usable with - -O -pedantic-errors. */ + avx5124vnniwintrin.h, avx512vpopcntdqintrin.h and mm_malloc.h.h are usable + with -O -pedantic-errors. */ #include diff --git a/gcc/testsuite/g++.dg/other/i386-3.C b/gcc/testsuite/g++.dg/other/i386-3.C index cd8f217..084a1bb 100644 --- a/gcc/testsuite/g++.dg/other/i386-3.C +++ b/gcc/testsuite/g++.dg/other/i386-3.C @@ -1,10 +1,10 @@ /* { dg-do compile { target i?86-*-* x86_64-*-* } } */ -/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */ +/* { dg-options "-O -fkeep-inline-functions -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512dq -mavx512bw -mavx512vl -mavx512ifma -mavx512vbmi -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */ /* Test that {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, pkuintrin.h, avx5124fmapsintrin.h, - avx5124vnniwintrin.h and mm_malloc.h are usable with - -O -fkeep-inline-functions. */ + avx5124vnniwintrin.h, avx512vpopcntdqintrin.h and mm_malloc.h are + usable with -O -fkeep-inline-functions. */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c new file mode 100644 index 0000000..c55a05a --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntd.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vpopcntdq" } */ +/* { dg-final { scan-assembler-times "vpopcntd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpopcntd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpopcntd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +extern __m512i z, z1; + +int foo () +{ + __mmask16 msk; + __m512i c = _mm512_popcnt_epi32 (z); + asm volatile ("" : "+v" (c)); + c = _mm512_mask_popcnt_epi32 (z, msk, z1); + asm volatile ("" : "+v" (c)); + c = _mm512_maskz_popcnt_epi32 (msk, z); + asm volatile ("" : "+v" (c)); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c new file mode 100644 index 0000000..2698ec3 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vpopcntdq-vpopcntq.c @@ -0,0 +1,20 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -mavx512vpopcntdq" } */ +/* { dg-final { scan-assembler-times "vpopcntq\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpopcntq\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpopcntq\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ + +#include + +extern __m512i z, z1; + +int foo () +{ + __mmask8 msk; + __m512i c = _mm512_popcnt_epi64 (z); + asm volatile ("" : "+v" (c)); + c = _mm512_mask_popcnt_epi64 (z, msk, z1); + asm volatile ("" : "+v" (c)); + c = _mm512_maskz_popcnt_epi64 (msk, z); + asm volatile ("" : "+v" (c)); +} diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c b/gcc/testsuite/gcc.target/i386/builtin_target.c index c620a74..e50695c 100644 --- a/gcc/testsuite/gcc.target/i386/builtin_target.c +++ b/gcc/testsuite/gcc.target/i386/builtin_target.c @@ -217,6 +217,8 @@ check_features (unsigned int ecx, unsigned int edx, assert (__builtin_cpu_supports ("avx5124vnniw")); if (edx & bit_AVX5124FMAPS) assert (__builtin_cpu_supports ("avx5124fmaps")); + if (ecx & bit_AVX512VPOPCNTDQ) + assert (__builtin_cpu_supports ("avx512vpopcntdq")); } } @@ -319,6 +321,8 @@ quick_check () assert (__builtin_cpu_supports ("avx5124fmaps") >= 0); + assert (__builtin_cpu_supports ("avx512vpopcntdq") >= 0); + /* Check CPU type. */ assert (__builtin_cpu_is ("amd") >= 0); diff --git a/gcc/testsuite/gcc.target/i386/funcspec-56.inc b/gcc/testsuite/gcc.target/i386/funcspec-56.inc index 9334e9e..c999080 100644 --- a/gcc/testsuite/gcc.target/i386/funcspec-56.inc +++ b/gcc/testsuite/gcc.target/i386/funcspec-56.inc @@ -30,6 +30,7 @@ extern void test_avx512pf(void) __attribute__((__target__("avx512pf"))); extern void test_avx512cd(void) __attribute__((__target__("avx512cd"))); extern void test_avx5124fmaps(void) __attribute__((__target__("avx5124fmaps"))); extern void test_avx5124vnniw(void) __attribute__((__target__("avx5124vnniw"))); +extern void test_avx512vpopcntdq(void) __attribute__((__target__("avx512vpopcntdq"))); extern void test_bmi (void) __attribute__((__target__("bmi"))); extern void test_bmi2 (void) __attribute__((__target__("bmi2"))); @@ -63,6 +64,7 @@ extern void test_bo_avx512pf(void) __attribute__((__target__("no-avx512pf"))); extern void test_no_avx512cd(void) __attribute__((__target__("no-avx512cd"))); extern void test_no_avx5124fmaps(void) __attribute__((__target__("no-avx5124fmaps"))); extern void test_no_avx5124vnniw(void) __attribute__((__target__("no-avx5124vnniw"))); +extern void test_no_avx512vpopcntdq(void) __attribute__((__target__("no-avx512vpopcntdq"))); extern void test_no_bmi (void) __attribute__((__target__("no-bmi"))); extern void test_no_bmi2 (void) __attribute__((__target__("no-bmi2"))); diff --git a/gcc/testsuite/gcc.target/i386/sse-12.c b/gcc/testsuite/gcc.target/i386/sse-12.c index 3e8417b..19ff785 100644 --- a/gcc/testsuite/gcc.target/i386/sse-12.c +++ b/gcc/testsuite/gcc.target/i386/sse-12.c @@ -3,7 +3,7 @@ popcntintrin.h and mm_malloc.h are usable with -O -std=c89 -pedantic-errors. */ /* { dg-do compile } */ -/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */ +/* { dg-options "-O -std=c89 -pedantic-errors -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512bw -mavx512dq -mavx512vl -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-13.c b/gcc/testsuite/gcc.target/i386/sse-13.c index 67f3b93..350e2ed 100644 --- a/gcc/testsuite/gcc.target/i386/sse-13.c +++ b/gcc/testsuite/gcc.target/i386/sse-13.c @@ -1,5 +1,5 @@ /* { dg-do compile } */ -/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mclwb -mmwaitx -mclzero -mpku" } */ +/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse4a -m3dnow -mavx -mavx2 -mfma4 -mxop -maes -mpclmul -mpopcnt -mabm -mlzcnt -mbmi -mbmi2 -mtbm -mlwp -mfsgsbase -mrdrnd -mf16c -mfma -mrtm -mrdseed -mprfchw -madx -mfxsr -mxsaveopt -mavx512f -mavx512er -mavx512cd -mavx512pf -msha -mprefetchwt1 -mxsavec -mxsaves -mclflushopt -mavx512vl -mavx512dq -mavx512bw -mavx512vbmi -mavx512ifma -mavx5124fmaps -mavx5124vnniw -mavx512vpopcntdq -mclwb -mmwaitx -mclzero -mpku" } */ /* { dg-add-options bind_pic_locally } */ #include diff --git a/gcc/testsuite/gcc.target/i386/sse-22.c b/gcc/testsuite/gcc.target/i386/sse-22.c index 44d48fd..85f9119 100644 --- a/gcc/testsuite/gcc.target/i386/sse-22.c +++ b/gcc/testsuite/gcc.target/i386/sse-22.c @@ -9,8 +9,8 @@ are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, - avx5124fmapsintrin.h, avx5124vnniwintrin.h and mm_malloc.h - that reference the proper builtin functions. + avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h and + mm_malloc.h that reference the proper builtin functions. Defining away "extern" and "__inline" results in all of them being compiled as proper functions. */ @@ -101,7 +101,7 @@ #ifndef DIFFERENT_PRAGMAS -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,avx512vl,avx512bw,avx512dq,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq") #endif /* Following intrinsics require immediate arguments. They @@ -218,7 +218,7 @@ test_4 (_mm_cmpestrz, int, __m128i, int, __m128i, int, 1) /* immintrin.h (AVX/AVX2/RDRND/FSGSBASE/F16C/RTM/AVX512F/SHA) */ #ifdef DIFFERENT_PRAGMAS -#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx5124fmaps,avx5124vnniw") +#pragma GCC target ("avx,avx2,rdrnd,fsgsbase,f16c,rtm,avx512f,avx512er,avx512cd,avx512pf,sha,avx512vl,avx512bw,avx512dq,avx512ifma,avx512vbmi,avx5124fmaps,avx5124vnniw,avx512vpopcntdq") #endif #include test_1 (_cvtss_sh, unsigned short, float, 1) diff --git a/gcc/testsuite/gcc.target/i386/sse-23.c b/gcc/testsuite/gcc.target/i386/sse-23.c index 61f1b00..3fc1f75 100644 --- a/gcc/testsuite/gcc.target/i386/sse-23.c +++ b/gcc/testsuite/gcc.target/i386/sse-23.c @@ -8,8 +8,8 @@ are defined as inline functions in {,x,e,p,t,s,w,a,b,i}mmintrin.h, mm3dnow.h, fma4intrin.h, xopintrin.h, abmintrin.h, bmiintrin.h, tbmintrin.h, lwpintrin.h, popcntintrin.h, fmaintrin.h, - avx5124fmapsintrin.h, avx5124vnniwintrin.h and mm_malloc.h - that reference the proper builtin functions. + avx5124fmapsintrin.h, avx5124vnniwintrin.h, avx512vpopcntdqintrin.h + and mm_malloc.h that reference the proper builtin functions. Defining away "extern" and "__inline" results in all of them being compiled as proper functions. */ @@ -595,6 +595,6 @@ #define __builtin_ia32_extracti64x2_256_mask(A, E, C, D) __builtin_ia32_extracti64x2_256_mask(A, 1, C, D) #define __builtin_ia32_extractf64x2_256_mask(A, E, C, D) __builtin_ia32_extractf64x2_256_mask(A, 1, C, D) -#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,clwb,mwaitx,clzero,pku") +#pragma GCC target ("sse4a,3dnow,avx,avx2,fma4,xop,aes,pclmul,popcnt,abm,lzcnt,bmi,bmi2,tbm,lwp,fsgsbase,rdrnd,f16c,fma,rtm,rdseed,prfchw,adx,fxsr,xsaveopt,avx512f,avx512er,avx512cd,avx512pf,sha,prefetchwt1,xsavec,xsaves,clflushopt,avx512bw,avx512dq,avx512vl,avx512vbmi,avx512ifma,avx5124fmaps,avx5124vnniw,avx512vpopcntdq,clwb,mwaitx,clzero,pku") #include diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index f0eb567..87db42d 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,10 @@ +2017-01-10 Andrew Senkevich + + * config/i386/cpuinfo.h (processor_features): Add + FEATURE_AVX512VPOPCNTDQ. + * config/i386/cpuinfo.c (get_available_features): Habdle new + feature. + 2017-01-04 Joseph Myers * config/mips/sfp-machine.h (_FP_CHOOSENAN): Always preserve NaN diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c index 9e9156b..737d1aa 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -277,6 +277,8 @@ get_available_features (unsigned int ecx, unsigned int edx, features |= (1 << FEATURE_AVX5124VNNIW); if (edx & bit_AVX5124FMAPS) features |= (1 << FEATURE_AVX5124FMAPS); + if (ecx & bit_AVX512VPOPCNTDQ) + features |= (1 << FEATURE_AVX512VPOPCNTDQ); } unsigned int ext_level; diff --git a/libgcc/config/i386/cpuinfo.h b/libgcc/config/i386/cpuinfo.h index ceb09d2..872b45e 100644 --- a/libgcc/config/i386/cpuinfo.h +++ b/libgcc/config/i386/cpuinfo.h @@ -104,7 +104,8 @@ enum processor_features FEATURE_AVX512VBMI, FEATURE_AVX512IFMA, FEATURE_AVX5124VNNIW, - FEATURE_AVX5124FMAPS + FEATURE_AVX5124FMAPS, + FEATURE_AVX512VPOPCNTDQ }; extern struct __processor_model -- 2.7.4