From 79a0c4655e47ca31c24e1d8cfd4c9a461571a100 Mon Sep 17 00:00:00 2001 From: Monk Liu Date: Wed, 22 Mar 2017 18:01:59 +0800 Subject: [PATCH] drm/amdgpu:fix gmc_v9 vm fault process for SRIOV for SRIOV we cannot use access register when in IRQ routine with regular KIQ method Signed-off-by: Monk Liu Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c | 24 ++++++++++++++++-------- 1 file changed, 16 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c index c29a477..f1f4eac 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c @@ -137,20 +137,28 @@ static int gmc_v9_0_process_interrupt(struct amdgpu_device *adev, addr = (u64)entry->src_data[0] << 12; addr |= ((u64)entry->src_data[1] & 0xf) << 44; - if (entry->vm_id_src) { - status = RREG32(mmhub->vm_l2_pro_fault_status); - WREG32_P(mmhub->vm_l2_pro_fault_cntl, 1, ~1); - } else { - status = RREG32(gfxhub->vm_l2_pro_fault_status); - WREG32_P(gfxhub->vm_l2_pro_fault_cntl, 1, ~1); - } + if (!amdgpu_sriov_vf(adev)) { + if (entry->vm_id_src) { + status = RREG32(mmhub->vm_l2_pro_fault_status); + WREG32_P(mmhub->vm_l2_pro_fault_cntl, 1, ~1); + } else { + status = RREG32(gfxhub->vm_l2_pro_fault_status); + WREG32_P(gfxhub->vm_l2_pro_fault_cntl, 1, ~1); + } - DRM_ERROR("[%s]VMC page fault (src_id:%u ring:%u vm_id:%u pas_id:%u) " + DRM_ERROR("[%s]VMC page fault (src_id:%u ring:%u vm_id:%u pas_id:%u) " "at page 0x%016llx from %d\n" "VM_L2_PROTECTION_FAULT_STATUS:0x%08X\n", entry->vm_id_src ? "mmhub" : "gfxhub", entry->src_id, entry->ring_id, entry->vm_id, entry->pas_id, addr, entry->client_id, status); + } else { + DRM_ERROR("[%s]VMC page fault (src_id:%u ring:%u vm_id:%u pas_id:%u) " + "at page 0x%016llx from %d\n", + entry->vm_id_src ? "mmhub" : "gfxhub", + entry->src_id, entry->ring_id, entry->vm_id, entry->pas_id, + addr, entry->client_id); + } return 0; } -- 2.7.4