From 7964c3ed8224239838429fce67fd872adeed348b Mon Sep 17 00:00:00 2001 From: Roman Lebedev Date: Tue, 12 Oct 2021 19:42:24 +0300 Subject: [PATCH] [X86] `detectAVGPattern()`: small preparatory NFC refactor --- llvm/lib/Target/X86/X86ISelLowering.cpp | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index d1579d4..be5edb7 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -46784,23 +46784,22 @@ static SDValue detectAVGPattern(SDValue In, EVT VT, SelectionDAG &DAG, return DAG.getNode(X86ISD::AVG, DL, Ops[0].getValueType(), Ops); }; - auto AVGSplitter = [&](SDValue Op0, SDValue Op1) { + auto AVGSplitter = [&](std::array Ops) { // Pad to a power-of-2 vector, split+apply and extract the original vector. unsigned NumElemsPow2 = PowerOf2Ceil(NumElems); EVT Pow2VT = EVT::getVectorVT(*DAG.getContext(), ScalarVT, NumElemsPow2); if (NumElemsPow2 != NumElems) { - SmallVector Ops0(NumElemsPow2, DAG.getUNDEF(ScalarVT)); - SmallVector Ops1(NumElemsPow2, DAG.getUNDEF(ScalarVT)); - for (unsigned i = 0; i != NumElems; ++i) { - SDValue Idx = DAG.getIntPtrConstant(i, DL); - Ops0[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, Op0, Idx); - Ops1[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, Op1, Idx); + for (SDValue &Op : Ops) { + SmallVector EltsOfOp(NumElemsPow2, DAG.getUNDEF(ScalarVT)); + for (unsigned i = 0; i != NumElems; ++i) { + SDValue Idx = DAG.getIntPtrConstant(i, DL); + EltsOfOp[i] = + DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, ScalarVT, Op, Idx); + } + Op = DAG.getBuildVector(Pow2VT, DL, EltsOfOp); } - Op0 = DAG.getBuildVector(Pow2VT, DL, Ops0); - Op1 = DAG.getBuildVector(Pow2VT, DL, Ops1); } - SDValue Res = - SplitOpsAndApply(DAG, Subtarget, DL, Pow2VT, {Op0, Op1}, AVGBuilder); + SDValue Res = SplitOpsAndApply(DAG, Subtarget, DL, Pow2VT, Ops, AVGBuilder); if (NumElemsPow2 == NumElems) return Res; return DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, VT, Res, @@ -46817,7 +46816,7 @@ static SDValue detectAVGPattern(SDValue In, EVT VT, SelectionDAG &DAG, SDValue VecOnes = DAG.getConstant(1, DL, InVT); Operands[1] = DAG.getNode(ISD::SUB, DL, InVT, Operands[1], VecOnes); Operands[1] = DAG.getNode(ISD::TRUNCATE, DL, VT, Operands[1]); - return AVGSplitter(Operands[0].getOperand(0), Operands[1]); + return AVGSplitter({Operands[0].getOperand(0), Operands[1]}); } // Matches 'add like' patterns: add(Op0,Op1) + zext(or(Op0,Op1)). @@ -46864,7 +46863,7 @@ static SDValue detectAVGPattern(SDValue In, EVT VT, SelectionDAG &DAG, } // The pattern is detected, emit X86ISD::AVG instruction(s). - return AVGSplitter(Operands[0], Operands[1]); + return AVGSplitter({Operands[0], Operands[1]}); } return SDValue(); -- 2.7.4