From 793bbd2db7e35a9dbf006e81a8373cd1c333ae53 Mon Sep 17 00:00:00 2001 From: Srinivas Kandagatla Date: Wed, 2 Dec 2020 18:07:37 +0000 Subject: [PATCH] arm64: dts: qcom: sm8250: add audio clock controllers Add audiocc and aoncc clock controller nodes required for audio on RB5. Signed-off-by: Srinivas Kandagatla Tested-by: Dmitry Baryshkov Link: https://lore.kernel.org/r/20201202180741.16386-3-srinivas.kandagatla@linaro.org [bjorn: Dropped includes for now] Signed-off-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 3aca8d0..98d5894 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -1264,6 +1264,26 @@ #hwlock-cells = <1>; }; + audiocc: clock-controller@3300000 { + compatible = "qcom,sm8250-lpass-audiocc"; + reg = <0 0x03300000 0 0x30000>; + #clock-cells = <1>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio", "bus"; + }; + + aoncc: clock-controller@3380000 { + compatible = "qcom,sm8250-lpass-aoncc"; + reg = <0 0x03380000 0 0x40000>; + #clock-cells = <1>; + clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6afecc LPASS_CLK_ID_TX_CORE_NPL_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio", "bus"; + }; + gpu: gpu@3d00000 { compatible = "qcom,adreno-650.2", "qcom,adreno"; -- 2.7.4