From 7927c4c5ce8cd5eae07fce12199f979d8586cec2 Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper@sifive.com>
Date: Mon, 5 Sep 2022 13:12:18 -0700
Subject: [PATCH] [X86] Add test cases for PR57549. NFC

---
 llvm/test/CodeGen/X86/extmul128.ll | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)

diff --git a/llvm/test/CodeGen/X86/extmul128.ll b/llvm/test/CodeGen/X86/extmul128.ll
index 09ad580..a7f2959 100644
--- a/llvm/test/CodeGen/X86/extmul128.ll
+++ b/llvm/test/CodeGen/X86/extmul128.ll
@@ -23,3 +23,33 @@ define i128 @i64_zext_i128(i64 %a, i64 %b) {
   %cc = mul i128 %aa, %bb
   ret i128 %cc
 }
+define i128 @i64_zext_sext_i128(i64 %a, i64 %b) {
+; CHECK-LABEL: i64_zext_sext_i128:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    mulq %rsi
+; CHECK-NEXT:    sarq $63, %rsi
+; CHECK-NEXT:    imulq %rdi, %rsi
+; CHECK-NEXT:    addq %rsi, %rdx
+; CHECK-NEXT:    retq
+  %aa = zext i64 %a to i128
+  %bb = sext i64 %b to i128
+  %cc = mul i128 %aa, %bb
+  ret i128 %cc
+}
+
+define i128 @i64_sext_zext_i128(i64 %a, i64 %b) {
+; CHECK-LABEL: i64_sext_zext_i128:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movq %rdi, %rax
+; CHECK-NEXT:    movq %rdi, %rcx
+; CHECK-NEXT:    sarq $63, %rcx
+; CHECK-NEXT:    mulq %rsi
+; CHECK-NEXT:    imulq %rsi, %rcx
+; CHECK-NEXT:    addq %rcx, %rdx
+; CHECK-NEXT:    retq
+  %aa = sext i64 %a to i128
+  %bb = zext i64 %b to i128
+  %cc = mul i128 %aa, %bb
+  ret i128 %cc
+}
-- 
2.7.4