From 7920c3c192bbccdc48823b02f00d2e1b39f1a9bf Mon Sep 17 00:00:00 2001 From: Christoph Bumiller Date: Thu, 6 Oct 2011 14:32:58 +0200 Subject: [PATCH] nvc0/ir: fix emission of cvt when register and type size differ --- src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp index bf59753..6bcbd62 100644 --- a/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp +++ b/src/gallium/drivers/nvc0/codegen/nv50_ir_emit_nvc0.cpp @@ -785,8 +785,9 @@ CodeEmitterNVC0::emitCVT(Instruction *i) roundMode_C(i); - code[0] |= util_logbase2(i->def[0].getSize()) << 20; - code[0] |= util_logbase2(i->src[0].getSize()) << 23; + // cvt u16 f32 sets high bits to 0, so we don't have to use Value::Size() + code[0] |= util_logbase2(typeSizeof(i->dType)) << 20; + code[0] |= util_logbase2(typeSizeof(i->sType)) << 23; if (sat) code[0] |= 0x20; -- 2.7.4